* [PATCH] perf vendor events: fix spelling mistake: "alloacated" -> "allocated"
@ 2018-04-27 18:52 Colin King
2018-04-30 13:52 ` Arnaldo Carvalho de Melo
0 siblings, 1 reply; 3+ messages in thread
From: Colin King @ 2018-04-27 18:52 UTC (permalink / raw)
To: Ingo Molnar, Arnaldo Carvalho de Melo, Alexander Shishkin,
Jiri Olsa, Namhyung Kim, linux-kernel
Cc: kernel-janitors
From: Colin Ian King <colin.king@canonical.com>
Trivial fix to spelling mistakes in json text strings
Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
tools/perf/pmu-events/arch/x86/nehalemep/cache.json | 4 ++--
tools/perf/pmu-events/arch/x86/nehalemex/cache.json | 4 ++--
tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json | 4 ++--
tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json | 4 ++--
tools/perf/pmu-events/arch/x86/westmereex/cache.json | 4 ++--
5 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/tools/perf/pmu-events/arch/x86/nehalemep/cache.json b/tools/perf/pmu-events/arch/x86/nehalemep/cache.json
index a11029efda2f..c20ff6b3cb9d 100644
--- a/tools/perf/pmu-events/arch/x86/nehalemep/cache.json
+++ b/tools/perf/pmu-events/arch/x86/nehalemep/cache.json
@@ -333,7 +333,7 @@
"UMask": "0x7",
"EventName": "L2_LINES_IN.ANY",
"SampleAfterValue": "100000",
- "BriefDescription": "L2 lines alloacated"
+ "BriefDescription": "L2 lines allocated"
},
{
"EventCode": "0xF1",
@@ -3226,4 +3226,4 @@
"BriefDescription": "Offcore prefetch requests that HITM in a remote cache",
"Offcore": "1"
}
-]
\ No newline at end of file
+]
diff --git a/tools/perf/pmu-events/arch/x86/nehalemex/cache.json b/tools/perf/pmu-events/arch/x86/nehalemex/cache.json
index 21a0f8fd057e..79f7120c50a5 100644
--- a/tools/perf/pmu-events/arch/x86/nehalemex/cache.json
+++ b/tools/perf/pmu-events/arch/x86/nehalemex/cache.json
@@ -333,7 +333,7 @@
"UMask": "0x7",
"EventName": "L2_LINES_IN.ANY",
"SampleAfterValue": "100000",
- "BriefDescription": "L2 lines alloacated"
+ "BriefDescription": "L2 lines allocated"
},
{
"EventCode": "0xF1",
@@ -3181,4 +3181,4 @@
"BriefDescription": "Offcore prefetch requests that HITM in a remote cache",
"Offcore": "1"
}
-]
\ No newline at end of file
+]
diff --git a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json
index 6e61ae20d01a..08fa9ebf056a 100644
--- a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json
+++ b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json
@@ -213,7 +213,7 @@
"UMask": "0x7",
"EventName": "L2_LINES_IN.ANY",
"SampleAfterValue": "100000",
- "BriefDescription": "L2 lines alloacated"
+ "BriefDescription": "L2 lines allocated"
},
{
"EventCode": "0xF1",
@@ -2814,4 +2814,4 @@
"BriefDescription": "REQUEST = PREFETCH and RESPONSE = REMOTE_CACHE_HITM",
"Offcore": "1"
}
-]
\ No newline at end of file
+]
diff --git a/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json
index dad20f0e3cac..be612cda6b68 100644
--- a/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json
+++ b/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json
@@ -213,7 +213,7 @@
"UMask": "0x7",
"EventName": "L2_LINES_IN.ANY",
"SampleAfterValue": "100000",
- "BriefDescription": "L2 lines alloacated"
+ "BriefDescription": "L2 lines allocated"
},
{
"EventCode": "0xF1",
@@ -3230,4 +3230,4 @@
"BriefDescription": "Offcore prefetch requests that HITM in a remote cache",
"Offcore": "1"
}
-]
\ No newline at end of file
+]
diff --git a/tools/perf/pmu-events/arch/x86/westmereex/cache.json b/tools/perf/pmu-events/arch/x86/westmereex/cache.json
index f9bc7fdd48d6..c5896ed6542c 100644
--- a/tools/perf/pmu-events/arch/x86/westmereex/cache.json
+++ b/tools/perf/pmu-events/arch/x86/westmereex/cache.json
@@ -213,7 +213,7 @@
"UMask": "0x7",
"EventName": "L2_LINES_IN.ANY",
"SampleAfterValue": "100000",
- "BriefDescription": "L2 lines alloacated"
+ "BriefDescription": "L2 lines allocated"
},
{
"EventCode": "0xF1",
@@ -3222,4 +3222,4 @@
"BriefDescription": "Offcore prefetch requests that HITM in a remote cache",
"Offcore": "1"
}
-]
\ No newline at end of file
+]
--
2.17.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] perf vendor events: fix spelling mistake: "alloacated" -> "allocated"
2018-04-27 18:52 [PATCH] perf vendor events: fix spelling mistake: "alloacated" -> "allocated" Colin King
@ 2018-04-30 13:52 ` Arnaldo Carvalho de Melo
2018-04-30 15:29 ` Andi Kleen
0 siblings, 1 reply; 3+ messages in thread
From: Arnaldo Carvalho de Melo @ 2018-04-30 13:52 UTC (permalink / raw)
To: Colin King
Cc: Ingo Molnar, Andi Kleen, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, linux-kernel, kernel-janitors
Em Fri, Apr 27, 2018 at 07:52:06PM +0100, Colin King escreveu:
> From: Colin Ian King <colin.king@canonical.com>
>
> Trivial fix to spelling mistakes in json text strings
These files are generated from other files, so any future update to them
will bring back the spelling mistakes, so, as Andi pointed out
previously, we better fix the spellings in the original files,
maintained by Intel.
- Arnaldo
> Signed-off-by: Colin Ian King <colin.king@canonical.com>
> ---
> tools/perf/pmu-events/arch/x86/nehalemep/cache.json | 4 ++--
> tools/perf/pmu-events/arch/x86/nehalemex/cache.json | 4 ++--
> tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json | 4 ++--
> tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json | 4 ++--
> tools/perf/pmu-events/arch/x86/westmereex/cache.json | 4 ++--
> 5 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/tools/perf/pmu-events/arch/x86/nehalemep/cache.json b/tools/perf/pmu-events/arch/x86/nehalemep/cache.json
> index a11029efda2f..c20ff6b3cb9d 100644
> --- a/tools/perf/pmu-events/arch/x86/nehalemep/cache.json
> +++ b/tools/perf/pmu-events/arch/x86/nehalemep/cache.json
> @@ -333,7 +333,7 @@
> "UMask": "0x7",
> "EventName": "L2_LINES_IN.ANY",
> "SampleAfterValue": "100000",
> - "BriefDescription": "L2 lines alloacated"
> + "BriefDescription": "L2 lines allocated"
> },
> {
> "EventCode": "0xF1",
> @@ -3226,4 +3226,4 @@
> "BriefDescription": "Offcore prefetch requests that HITM in a remote cache",
> "Offcore": "1"
> }
> -]
> \ No newline at end of file
> +]
> diff --git a/tools/perf/pmu-events/arch/x86/nehalemex/cache.json b/tools/perf/pmu-events/arch/x86/nehalemex/cache.json
> index 21a0f8fd057e..79f7120c50a5 100644
> --- a/tools/perf/pmu-events/arch/x86/nehalemex/cache.json
> +++ b/tools/perf/pmu-events/arch/x86/nehalemex/cache.json
> @@ -333,7 +333,7 @@
> "UMask": "0x7",
> "EventName": "L2_LINES_IN.ANY",
> "SampleAfterValue": "100000",
> - "BriefDescription": "L2 lines alloacated"
> + "BriefDescription": "L2 lines allocated"
> },
> {
> "EventCode": "0xF1",
> @@ -3181,4 +3181,4 @@
> "BriefDescription": "Offcore prefetch requests that HITM in a remote cache",
> "Offcore": "1"
> }
> -]
> \ No newline at end of file
> +]
> diff --git a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json
> index 6e61ae20d01a..08fa9ebf056a 100644
> --- a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json
> +++ b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json
> @@ -213,7 +213,7 @@
> "UMask": "0x7",
> "EventName": "L2_LINES_IN.ANY",
> "SampleAfterValue": "100000",
> - "BriefDescription": "L2 lines alloacated"
> + "BriefDescription": "L2 lines allocated"
> },
> {
> "EventCode": "0xF1",
> @@ -2814,4 +2814,4 @@
> "BriefDescription": "REQUEST = PREFETCH and RESPONSE = REMOTE_CACHE_HITM",
> "Offcore": "1"
> }
> -]
> \ No newline at end of file
> +]
> diff --git a/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json
> index dad20f0e3cac..be612cda6b68 100644
> --- a/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json
> +++ b/tools/perf/pmu-events/arch/x86/westmereep-sp/cache.json
> @@ -213,7 +213,7 @@
> "UMask": "0x7",
> "EventName": "L2_LINES_IN.ANY",
> "SampleAfterValue": "100000",
> - "BriefDescription": "L2 lines alloacated"
> + "BriefDescription": "L2 lines allocated"
> },
> {
> "EventCode": "0xF1",
> @@ -3230,4 +3230,4 @@
> "BriefDescription": "Offcore prefetch requests that HITM in a remote cache",
> "Offcore": "1"
> }
> -]
> \ No newline at end of file
> +]
> diff --git a/tools/perf/pmu-events/arch/x86/westmereex/cache.json b/tools/perf/pmu-events/arch/x86/westmereex/cache.json
> index f9bc7fdd48d6..c5896ed6542c 100644
> --- a/tools/perf/pmu-events/arch/x86/westmereex/cache.json
> +++ b/tools/perf/pmu-events/arch/x86/westmereex/cache.json
> @@ -213,7 +213,7 @@
> "UMask": "0x7",
> "EventName": "L2_LINES_IN.ANY",
> "SampleAfterValue": "100000",
> - "BriefDescription": "L2 lines alloacated"
> + "BriefDescription": "L2 lines allocated"
> },
> {
> "EventCode": "0xF1",
> @@ -3222,4 +3222,4 @@
> "BriefDescription": "Offcore prefetch requests that HITM in a remote cache",
> "Offcore": "1"
> }
> -]
> \ No newline at end of file
> +]
> --
> 2.17.0
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] perf vendor events: fix spelling mistake: "alloacated" -> "allocated"
2018-04-30 13:52 ` Arnaldo Carvalho de Melo
@ 2018-04-30 15:29 ` Andi Kleen
0 siblings, 0 replies; 3+ messages in thread
From: Andi Kleen @ 2018-04-30 15:29 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo
Cc: Colin King, Ingo Molnar, Andi Kleen, Alexander Shishkin,
Jiri Olsa, Namhyung Kim, linux-kernel, kernel-janitors
On Mon, Apr 30, 2018 at 10:52:56AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Fri, Apr 27, 2018 at 07:52:06PM +0100, Colin King escreveu:
> > From: Colin Ian King <colin.king@canonical.com>
> >
> > Trivial fix to spelling mistakes in json text strings
>
> These files are generated from other files, so any future update to them
> will bring back the spelling mistakes, so, as Andi pointed out
> previously, we better fix the spellings in the original files,
> maintained by Intel.
Thanks. I forwarded to the right people.
-Andi
^ permalink raw reply [flat|nested] 3+ messages in thread
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2018-04-27 18:52 [PATCH] perf vendor events: fix spelling mistake: "alloacated" -> "allocated" Colin King
2018-04-30 13:52 ` Arnaldo Carvalho de Melo
2018-04-30 15:29 ` Andi Kleen
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