From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753929AbeE1HJj convert rfc822-to-8bit (ORCPT ); Mon, 28 May 2018 03:09:39 -0400 Received: from mail.bootlin.com ([62.4.15.54]:35075 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753658AbeE1HJe (ORCPT ); Mon, 28 May 2018 03:09:34 -0400 Date: Mon, 28 May 2018 09:09:31 +0200 From: Miquel Raynal To: Abhishek Sahu Cc: Boris Brezillon , David Woodhouse , Brian Norris , Marek Vasut , Richard Weinberger , Cyrille Pitchen , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Andy Gross , Archit Taneja Subject: Re: [PATCH v3 13/16] mtd: rawnand: qcom: minor code reorganization for bad block check Message-ID: <20180528090931.4a208c62@xps13> In-Reply-To: References: <1527250904-21988-1-git-send-email-absahu@codeaurora.org> <1527250904-21988-14-git-send-email-absahu@codeaurora.org> <20180526104900.139dd19b@xps13> Organization: Bootlin X-Mailer: Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Abhishek, On Mon, 28 May 2018 11:46:47 +0530, Abhishek Sahu wrote: > On 2018-05-26 14:28, Miquel Raynal wrote: > > Hi Abhishek, > > > >> @@ -2141,12 +2127,10 @@ static int qcom_nandc_block_bad(struct >> mtd_info *mtd, loff_t ofs) > >> goto err; > >> } > >> >> - bbpos = mtd->writesize - host->cw_size * (ecc->steps - 1); > >> - > >> - bad = nandc->data_buffer[bbpos] != 0xff; > >> + bad = bbm_bytes_buf[0] != 0xff; > > > BTW, as there are host->bbm_size bytes that can inform on the block > > state, don't we need to check all of them? > > > We are checking all of them. > host->bbm_size will be either 1 (for NAND_BUSWIDTH_8) or > 2 (for NAND_BUSWIDTH_16). > > https://elixir.bootlin.com/linux/v4.17-rc7/source/drivers/mtd/nand/raw/qcom_nandc.c#L2347 > > Thanks, > Abhishek > > >> >> if (chip->options & NAND_BUSWIDTH_16) > >> - bad = bad || (nandc->data_buffer[bbpos + 1] != 0xff); > >> + bad = bad || (bbm_bytes_buf[1] != 0xff); As told in my previous reply, I missed the above line. However, after checking the code of the core (nand_base.c) I wonder if it is useful to check for the second byte. And if you look at the core's implementation you'll see that the offset is not always 0 in the OOB but maybe 5 for small page NAND chips. Please have a look to the generic implementation and tell me why this is really needed? Thanks, Miquèl