From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AAF74C3279B for ; Wed, 4 Jul 2018 17:36:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 660FC208E5 for ; Wed, 4 Jul 2018 17:36:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 660FC208E5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753225AbeGDRgV (ORCPT ); Wed, 4 Jul 2018 13:36:21 -0400 Received: from mga09.intel.com ([134.134.136.24]:53642 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752277AbeGDRgU (ORCPT ); Wed, 4 Jul 2018 13:36:20 -0400 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Jul 2018 10:36:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,306,1526367600"; d="scan'208";a="62292187" Received: from saamir-mobl.ger.corp.intel.com (HELO localhost) ([10.252.34.242]) by FMSMGA003.fm.intel.com with ESMTP; 04 Jul 2018 10:36:13 -0700 Date: Wed, 4 Jul 2018 20:36:12 +0300 From: Jarkko Sakkinen To: Randy Dunlap Cc: Thomas Gleixner , x86@kernel.org, platform-driver-x86@vger.kernel.org, dave.hansen@intel.com, sean.j.christopherson@intel.com, nhorman@redhat.com, npmccallum@redhat.com, linux-sgx@vger.kernel.org, Ingo Molnar , "H. Peter Anvin" , "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)" Subject: Re: [PATCH v12 07/13] x86/sgx: data structures for tracking available EPC pages Message-ID: <20180704173612.GK6724@linux.intel.com> References: <20180703182118.15024-1-jarkko.sakkinen@linux.intel.com> <20180703182118.15024-8-jarkko.sakkinen@linux.intel.com> <00ca61d5-5a1d-5c83-3b49-62c899a87041@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <00ca61d5-5a1d-5c83-3b49-62c899a87041@infradead.org> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 03, 2018 at 01:26:11PM -0700, Randy Dunlap wrote: > On 07/03/18 12:46, Thomas Gleixner wrote: > > On Tue, 3 Jul 2018, Jarkko Sakkinen wrote: > > > >> SGX has a set of data structures to maintain information about the enclaves > >> and their security properties. BIOS reserves a fixed size region of > >> physical memory for these structures by setting Processor Reserved Memory > >> Range Registers (PRMRR). This memory area is called Enclave Page Cache > >> (EPC). > >> > >> This commit adds a database of EPC banks for kernel to easily access the > > what kind of database? How does one query it? Have to think of a better word. Thanks! /Jarkko