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McKenney" To: Alan Stern Cc: Andrea Parri , Will Deacon , LKMM Maintainers -- Akira Yokosawa , Boqun Feng , David Howells , Jade Alglave , Luc Maranget , Nicholas Piggin , Peter Zijlstra , Kernel development list , dlustig@nvidia.com Subject: Re: [PATCH 2/2] tools/memory-model: Add write ordering by release-acquire and by locks Reply-To: paulmck@linux.vnet.ibm.com References: <20180705150945.GA3699@andrea> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-TM-AS-GCONF: 00 x-cbid: 18070621-0072-0000-0000-0000037C1440 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00009321; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000266; SDB=6.01057548; UDB=6.00542596; IPR=6.00835468; MB=3.00022032; MTD=3.00000008; XFM=3.00000015; UTC=2018-07-06 21:08:43 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18070621-0073-0000-0000-0000489E82A7 Message-Id: <20180706211055.GN3593@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-07-06_06:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=781 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1806210000 definitions=main-1807060237 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jul 06, 2018 at 04:37:21PM -0400, Alan Stern wrote: > On Thu, 5 Jul 2018, Andrea Parri wrote: > > > > At any rate, it looks like instead of strengthening the relation, I > > > should write a patch that removes it entirely. I also will add new, > > > stronger relations for use with locking, essentially making spin_lock > > > and spin_unlock be RCsc. > > > > Thank you. > > > > Ah let me put this forward: please keep an eye on the (generic) > > > > queued_spin_lock() > > queued_spin_unlock() > > > > (just to point out an example). Their implementation (in part., > > the fast-path) suggests that if we will stick to RCsc lock then > > we should also stick to RCsc acq. load from RMW and rel. store. > > A very good point. The implementation of those routines uses > atomic_cmpxchg_acquire() to acquire the lock. Unless this is > implemented with an operation or fence that provides write-write > ordering (in conjunction with a suitable release), qspinlocks won't > have the ordering properties that we want. > > I'm going to assume that the release operations used for unlocking > don't need to have any extra properties; only the lock-acquire > operations need to be special (i.e., stronger than a normal > smp_load_acquire). This suggests that atomic RMW functions with acquire > semantics should also use this stronger form of acquire. > > Does anybody have a different suggestion? The approach you suggest makes sense to me. Will, Peter, Daniel, any reasons why this approach would be a problem for you guys? Thanx, Paul