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[24.223.123.72]) by smtp.gmail.com with ESMTPSA id y85-v6sm11281773oie.25.2018.07.11.09.12.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 Jul 2018 09:12:07 -0700 (PDT) Date: Wed, 11 Jul 2018 10:12:06 -0600 From: Rob Herring To: Jisheng Zhang Cc: Ulf Hansson , Mark Rutland , Adrian Hunter , devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Manjunath M B , Prabu Thangamuthu , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 1/2] dt: bindings: Add bindings for SDHCI Synopsys DWC MSHC Message-ID: <20180711161206.GA1558@rob-hp-laptop> References: <20180706151930.78b3024b@xhacker.debian> <20180706152047.0b0a4944@xhacker.debian> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180706152047.0b0a4944@xhacker.debian> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jul 06, 2018 at 03:20:47PM +0800, Jisheng Zhang wrote: > Synopsys SDHCI compatible DesignWare Cores Mobile Storage Host > Controller can support eMMC/SD/SDIO. Add the bindings. > > Signed-off-by: Jisheng Zhang > --- > .../bindings/mmc/sdhci-of-dwcmshc.txt | 20 +++++++++++++++++++ > 1 file changed, 20 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt b/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt > new file mode 100644 > index 000000000000..ee4253b33be2 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt > @@ -0,0 +1,20 @@ > +* Synopsys DesignWare Cores Mobile Storage Host Controller > + > +Required properties: > +- compatible: should be one of the following: > + "snps,dwcmshc-sdhci" Needs to note that there must also be an SoC specific compatible. > +- reg: offset and length of the register set for the device. > +- interrupts: a single interrupt specifier. > +- clocks: Array of clocks required for SDHCI; requires at least one for > + core clock. > +- clock-names: Array of names corresponding to clocks property; shall be > + "core" for core clock and "bus" for optional bus clock. > + > +Example: > + sdhci2: sdhci@aa0000 { > + compatible = "snps,dwcmshc-sdhci"; > + reg = <0xaa0000 0x1000>; > + interrupts = ; > + clocks = <&emmcclk>; > + bus-width = <8>; > + } > -- > 2.18.0 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel