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McKenney" To: Steven Rostedt Cc: Joel Fernandes , Joel Fernandes , LKML , "Cc: Android Kernel" , Boqun Feng , Byungchul Park , Ingo Molnar , Masami Hiramatsu , Mathieu Desnoyers , Namhyung Kim , Peter Zijlstra , Thomas Glexiner , Tom Zanussi Subject: Re: [PATCH v12 3/3] tracing: Centralize preemptirq tracepoints and unify their usage Reply-To: paulmck@linux.vnet.ibm.com References: <20180807204820.50b83c6d@vmware.local.home> <20180807215522.04114097@vmware.local.home> <20180807222856.3ede96e7@vmware.local.home> <20180808084629.3290d1d6@gandalf.local.home> <20180808130302.GJ24813@linux.vnet.ibm.com> <20180808090724.41677176@gandalf.local.home> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180808090724.41677176@gandalf.local.home> User-Agent: Mutt/1.5.21 (2010-09-15) X-TM-AS-GCONF: 00 x-cbid: 18080814-0072-0000-0000-0000038D73C8 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00009507; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000266; SDB=6.01070981; UDB=6.00551364; IPR=6.00850510; MB=3.00022589; MTD=3.00000008; XFM=3.00000015; UTC=2018-08-08 14:33:13 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18080814-0073-0000-0000-00004902630E Message-Id: <20180808143310.GL24813@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-08-08_05:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=482 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1808080150 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Aug 08, 2018 at 09:07:24AM -0400, Steven Rostedt wrote: > On Wed, 8 Aug 2018 06:03:02 -0700 > "Paul E. McKenney" wrote: > > > What's wrong with a this_cpu_inc()? It's atomic for the CPU. Although > > > it wont be atomic for the capture of the idx. But I also don't see > > > interrupts being disabled, thus an NMI is no different than any > > > interrupt doing the same thing, right? > > > > On architectures without increment-memory instructions, if you take an NMI > > between the load from sp->sda->srcu_lock_count and the later store, you > > lose a count. Note that both __srcu_read_lock() and __srcu_read_unlock() > > do increments of different locations, so you cannot rely on the usual > > "NMI fixes up before exit" semantics you get when incrementing and > > decrementing the same location. > > And how is this handled in the interrupt case? Interrupts are not > disabled here. Actually, on most architectures interrupts are in fact disabled: #define this_cpu_generic_to_op(pcp, val, op) \ do { \ unsigned long __flags; \ raw_local_irq_save(__flags); \ raw_cpu_generic_to_op(pcp, val, op); \ raw_local_irq_restore(__flags); \ } while (0) NMIs, not so much. > I would also argue that architectures without increment-memory > instructions shouldn't have NMIs ;-) I would also argue a lot of things, but objective reality does not take my opinions into account all that often. Which might be a good thing. ;-) Thanx, Paul