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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id 87-v6sm884078pfn.103.2018.08.27.20.20.36 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 27 Aug 2018 20:20:36 -0700 (PDT) Date: Mon, 27 Aug 2018 20:20:34 -0700 From: Bjorn Andersson To: Lina Iyer Cc: Linus Walleij , Hans Verkuil , Hans Verkuil , Marc Zyngier , Stephen Boyd , evgreen@chromium.org, rplsssn@codeaurora.org, "linux-kernel@vger.kernel.org" , linux-arm-msm@vger.kernel.org, Rajendra Nayak , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Andy Gross , Doug Anderson Subject: Re: [PATCH v2 1/5] drivers: pinctrl: qcom: add wakeup capability to GPIO Message-ID: <20180828032034.GG2523@minitux> References: <20180817163849.30750-1-ilina@codeaurora.org> <20180817163849.30750-2-ilina@codeaurora.org> <20180827165644.GR5081@codeaurora.org> <20180828002641.GC2523@minitux> <20180828014652.GB13998@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180828014652.GB13998@codeaurora.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon 27 Aug 18:46 PDT 2018, Lina Iyer wrote: > On Mon, Aug 27 2018 at 18:26 -0600, Bjorn Andersson wrote: > > On Mon 27 Aug 09:56 PDT 2018, Lina Iyer wrote: [..] > > > Thanks, I will look into Hans's RFCv2. But what would help me would be > > > to avoid creating the IRQ for the GPIO itself (I have the latent IRQ), > > > if I could just return that instead in gpio_to_irq(), it might be > > > easier. I understand ->to_irq() is supposed to be a translate function > > > only, I can avoid the dance of enabling and diabling the PDC IRQ on > > > suspend and resume. > > > > > > > I did implement gpio_to_irq() like this in the PMIC gpio/mpp drivers and > > we've since concluded that we need to move this to some hierarchical > > interrupt controller, because people like Linus expect to be able to say > > > > interrupts = <&gpio_controller 1 IRQ_TYPE_EDGE_RISING> > > > > which is something used all over the place with the TLMM driver today. > > Does it have to be &gpio_controller, can it be another interrupt controller? > > Say, > interrupts-extended = <&pdc 1 IRQ_TYPE_EDGE_RISING>; > It would require that the GPIO interrupt number space of the PDC matches the pin numbering of the TLMM, to be somewhat maintainable. And it would still require DT-writers to know that if the implementation of a compatible, that references a TLMM IRQ, wants to mark the IRQ wake capable it needs to reference the PDC instead...while still having a pinmux/pinconf setting for the TLMM. And for gpio_to_irq() we would need to do the mapping that you suggest, so the TLMM still needs to have all these references to the PDC. So I think it would be nice if we could avoid this scenario, but I don't have any good ideas of how to do this right now... Regards, Bjorn