From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4790FC4321E for ; Fri, 7 Sep 2018 06:07:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EB83520645 for ; Fri, 7 Sep 2018 06:07:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EB83520645 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=c-sky.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726632AbeIGKrB (ORCPT ); Fri, 7 Sep 2018 06:47:01 -0400 Received: from smtp2200-217.mail.aliyun.com ([121.197.200.217]:34303 "EHLO smtp2200-217.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725933AbeIGKrB (ORCPT ); Fri, 7 Sep 2018 06:47:01 -0400 X-Alimail-AntiSpam: AC=CONTINUE;BC=0.2044927|-1;CH=green;FP=0|0|0|0|0|-1|-1|-1;HT=e02c03295;MF=ren_guo@c-sky.com;NM=1;PH=DS;RN=12;RT=12;SR=0;TI=SMTPD_---.Cna0D7W_1536300450; Received: from localhost(mailfrom:ren_guo@c-sky.com fp:SMTPD_---.Cna0D7W_1536300450) by smtp.aliyun-inc.com(10.147.40.200); Fri, 07 Sep 2018 14:07:31 +0800 Date: Fri, 7 Sep 2018 14:07:30 +0800 From: Guo Ren To: Arnd Bergmann Cc: Rob Herring , linux-arch , Linux Kernel Mailing List , Thomas Gleixner , Daniel Lezcano , Jason Cooper , c-sky_gcc_upstream@c-sky.com, gnu-csky@mentor.com, Thomas Petazzoni , wbx@uclibc-ng.org, Greentime Hu Subject: Re: [PATCH V3 22/26] dt-bindings: interrupt-controller: C-SKY SMP intc Message-ID: <20180907060730.GB16834@guoren> References: <20180906022322.GA30251@guoren-Inspiron-7460> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 06, 2018 at 03:03:16PM +0200, Arnd Bergmann wrote: > > INTCG_base = ioremap(mfcr("cr<31, 14>"), INTC_SIZE); > > It that reliable? I remember a similar situation with some registers on ARM > that are usually identified through a special CPU register, but in some > cases the SoC integrator put the wrong address in there, so we need to > look up the address in DT anyway. Yes, it's reliable. This interrupt is combined with CPU and not on AXI or APB. Soc just give a hole in the address space and tell the CPU where the address is with 20 wire-signals. Guo Ren