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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id i3-v6sm18406157pgq.35.2018.09.10.10.47.31 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Sep 2018 10:47:31 -0700 (PDT) Date: Mon, 10 Sep 2018 10:47:29 -0700 From: Bjorn Andersson To: Douglas Anderson Cc: Andy Gross , swboyd@chromium.org, tfiga@chromium.org, Manu Gautam , David Collins , Vivek Gautam , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , David Brown , Mark Rutland , linux-soc@vger.kernel.org Subject: Re: [PATCH v3 3/3] arm64: dts: qcom: sdm845-mtp: Add nodes for USB Message-ID: <20180910174729.GC2523@minitux> References: <20180822173629.202885-1-dianders@chromium.org> <20180822173629.202885-4-dianders@chromium.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180822173629.202885-4-dianders@chromium.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed 22 Aug 10:36 PDT 2018, Douglas Anderson wrote: > Set the various nodes to "okay" and hook up the regulators. > > NOTE: For now the main USB port (the one that goes out the Type C > connector) is forced to host. Eventually someone will need to get the > Type C detection hooked up and get this all integrated with the > PMI8998 PMIC. The reason for forcing to "host" in the meantime is > that this will leave us with one "host" and one "peripheral" port. > > In order for host mode this to work, we assume that the bootloader > left things configured enough for us. Apparently the magic for that > is is to do these writes on pmi8998: > - pm_comm_write_byte(2, 0x1153, 0x2C, 0); > - pm_comm_write_byte(2, 0x1152, 0x07, 0); > - pm_comm_write_byte(2, 0x1140, 0x00, 0); > - pm_comm_write_byte(2, 0x1140, 0x01, 0); > > Signed-off-by: Douglas Anderson Reviewed-by: Bjorn Andersson Regards, Bjorn > --- > > Changes in v3: None > Changes in v2: None > > arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 61 +++++++++++++++++++++++++ > 1 file changed, 61 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > index ef53c4ae60b0..eedfaf8922e2 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > @@ -356,6 +356,67 @@ > status = "okay"; > }; > > +&usb_1 { > + status = "okay"; > +}; > + > +&usb_1_dwc3 { > + /* Until we have Type C hooked up we'll force this as host. */ > + dr_mode = "host"; > +}; > + > +&usb_1_hsphy { > + status = "okay"; > + > + vdd-supply = <&vdda_usb1_ss_core>; > + vdda-pll-supply = <&vdda_qusb_hs0_1p8>; > + vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>; > + > + qcom,imp-res-offset-value = <8>; > + qcom,hstx-trim-value = ; > + qcom,preemphasis-level = ; > + qcom,preemphasis-width = ; > +}; > + > +&usb_1_qmpphy { > + status = "okay"; > + > + vdda-phy-supply = <&vdda_usb1_ss_1p2>; > + vdda-pll-supply = <&vdda_usb1_ss_core>; > +}; > + > +&usb_2 { > + status = "okay"; > +}; > + > +&usb_2_dwc3 { > + /* > + * Though the USB block on SDM845 can support host, there's no vbus > + * signal for this port on MTP. Thus (unless you have a non-compliant > + * hub that works without vbus) the only sensible thing is to force > + * peripheral mode. > + */ > + dr_mode = "peripheral"; > +}; > + > +&usb_2_hsphy { > + status = "okay"; > + > + vdd-supply = <&vdda_usb2_ss_core>; > + vdda-pll-supply = <&vdda_qusb_hs0_1p8>; > + vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>; > + > + qcom,imp-res-offset-value = <8>; > + qcom,hstx-trim-value = ; > +}; > + > +&usb_2_qmpphy { > + status = "okay"; > + > + vdda-phy-supply = <&vdda_usb2_ss_1p2>; > + vdda-pll-supply = <&vdda_usb2_ss_core>; > +}; > + > /* PINCTRL - additions to nodes defined in sdm845.dtsi */ > > &qup_i2c10_default { > -- > 2.18.0.1017.ga543ac7ca45-goog >