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[94.230.152.15]) by smtp.gmail.com with ESMTPSA id m35-v6sm6852725ede.14.2018.09.25.10.49.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 25 Sep 2018 10:49:13 -0700 (PDT) Date: Tue, 25 Sep 2018 19:49:06 +0200 From: Andrea Parri To: Palmer Dabbelt Cc: linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org Subject: Re: [PATCH 1/2] riscv/bitops: Remove smp_mb__{before,after}_clear_bit() Message-ID: <20180925174906.GA4372@andrea> References: <20180925121225.9917-2-andrea.parri@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 25, 2018 at 10:19:24AM -0700, Palmer Dabbelt wrote: > On Tue, 25 Sep 2018 05:12:24 PDT (-0700), andrea.parri@amarulasolutions.com wrote: > > The barriers are unused; remove their definition. > > > > Signed-off-by: Andrea Parri > > Cc: Palmer Dabbelt > > Cc: Albert Ou > > Cc: > > --- > > arch/riscv/include/asm/bitops.h | 5 ----- > > 1 file changed, 5 deletions(-) > > > > diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h > > index f30daf26f08f4..01db98dfd0435 100644 > > --- a/arch/riscv/include/asm/bitops.h > > +++ b/arch/riscv/include/asm/bitops.h > > @@ -23,11 +23,6 @@ > > #include > > #include > > > > -#ifndef smp_mb__before_clear_bit > > -#define smp_mb__before_clear_bit() smp_mb() > > -#define smp_mb__after_clear_bit() smp_mb() > > -#endif /* smp_mb__before_clear_bit */ > > - > > #include > > #include > > #include > > Reviewed-by: Palmer Dabbelt Thank you. > > Do you want me to take this via the RISC-V tree? I only ended up with patch > 1/2 in my inbox, and I probably shouldn't take both. I expected this to go via the RISC-V tree and 2/2 via the H8/300 tree, but really no preference from me as long as they get upstreamed. ;-) Thanks, Andrea > > Thanks!