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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id 63-v6sm2056677oti.68.2018.09.27.09.43.18 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 27 Sep 2018 09:43:18 -0700 (PDT) Date: Thu, 27 Sep 2018 11:43:17 -0500 From: Rob Herring To: Guo Ren Cc: akpm@linux-foundation.org, arnd@arndb.de, daniel.lezcano@linaro.org, davem@davemloft.net, gregkh@linuxfoundation.org, jason@lakedaemon.net, marc.zyngier@arm.com, mark.rutland@arm.com, mchehab+samsung@kernel.org, peterz@infradead.org, tglx@linutronix.de, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, devicetree@vger.kernel.org, green.hu@gmail.com, palmer@sifive.com Subject: Re: [PATCH V5 18/30] dt-bindings: csky CPU Bindings Message-ID: <20180927164317.GA8427@bogus> References: <62098e7d0a7fbdd09f44d7e23333dad258a01bd2.1537789737.git.ren_guo@c-sky.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <62098e7d0a7fbdd09f44d7e23333dad258a01bd2.1537789737.git.ren_guo@c-sky.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 25, 2018 at 07:39:21AM +0800, Guo Ren wrote: > This patch adds the documentation to describe that how to add cpu nodes in > dts for SMP. > > Signed-off-by: Guo Ren > --- > Documentation/devicetree/bindings/csky/cpus.txt | 70 +++++++++++++++++++++++++ > 1 file changed, 70 insertions(+) > create mode 100644 Documentation/devicetree/bindings/csky/cpus.txt > > diff --git a/Documentation/devicetree/bindings/csky/cpus.txt b/Documentation/devicetree/bindings/csky/cpus.txt > new file mode 100644 > index 0000000..ee3901d > --- /dev/null > +++ b/Documentation/devicetree/bindings/csky/cpus.txt > @@ -0,0 +1,70 @@ > +================== > +C-SKY CPU Bindings > +================== > + > +The device tree allows to describe the layout of CPUs in a system through > +the "cpus" node, which in turn contains a number of subnodes (ie "cpu") > +defining properties for every cpu. > + > +Only SMP system need to care about the cpus node and single processor > +needn't define cpus node at all. We've generally found this is not true. Even for single core, you can have power domains, clocks for DVFS, etc. > + > +===================================== > +cpus and cpu node bindings definition > +===================================== > + > +- cpus node > + > + Description: Container of cpu nodes > + > + The node name must be "cpus". > + > + A cpus node must define the following properties: > + > + - #address-cells > + Usage: required > + Value type: > + Definition: must be set to 1 > + - #size-cells > + Usage: required > + Value type: > + Definition: must be set to 0 > + > +- cpu node > + > + Description: Describes one of SMP cores > + > + PROPERTIES > + You need a compatible property for cpu nodes. > + - device_type > + Usage: required > + Value type: > + Definition: must be "cpu" > + - reg > + Usage: required > + Value type: > + Definition: CPU index > + - status: You don't need to document status here. > + Usage: required > + Value type: > + Definition: "ok" means enable the cpu-core > + "disabled" means disable the cpu-core > + > +Example: > +-------- > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + cpu@0 { > + device_type = "cpu"; > + reg = <0>; > + status = "ok"; > + }; > + > + cpu@1 { > + device_type = "cpu"; > + reg = <1>; > + status = "ok"; > + }; > + }; > -- > 2.7.4 >