From: "Paul E. McKenney" <paulmck@linux.ibm.com>
To: Andrea Parri <andrea.parri@amarulasolutions.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Josh Triplett <josh@joshtriplett.org>,
linux-kernel@vger.kernel.org
Subject: Re: [RFR] Store tearing
Date: Sun, 28 Oct 2018 18:20:42 -0700 [thread overview]
Message-ID: <20181029012042.GR4170@linux.ibm.com> (raw)
In-Reply-To: <20181028231003.GA4021@andrea>
On Mon, Oct 29, 2018 at 12:10:03AM +0100, Andrea Parri wrote:
> Hopefully, with Paul's proper email address this time,
>
> Andrea
>
> On Mon, Oct 29, 2018 at 12:06:27AM +0100, Andrea Parri wrote:
> > Hi,
> >
> > memory-barriers.txt says:
> >
> > [on "store tearing"]
> >
> > "In fact, a recent bug (since fixed) caused GCC to incorrectly use
> > this optimization in a volatile store.".
> >
> > I was wondering if you could help me retrieve some reference/discussions
> > about this?
This was quite some time ago, but it involved a 32-bit volatile store
of a constant such as 0x10001. The machine in question had a narrow
store-immediate instruction, so the compiler emitted a pair of 16-bit
store-immediate instructions. This bug was fixed, though only after
significant screaming and shouting.
Thanx, Paul
next prev parent reply other threads:[~2018-10-29 1:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-28 23:06 [RFR] Store tearing Andrea Parri
2018-10-28 23:10 ` Andrea Parri
2018-10-29 1:20 ` Paul E. McKenney [this message]
2018-10-29 5:16 ` Andrea Parri
2018-10-29 9:23 ` Arnd Bergmann
2018-10-29 11:27 ` Paul E. McKenney
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