Re: [PATCH RFC 1/1] drivers: pinctrl: qcom: add wakeup capability to GPIO

[Lina Iyer <ilina@codeaurora.org>]

On Wed, Oct 31 2018 at 01:05 -0600, Stephen Boyd wrote:
>Hi Lina,
>
>Quoting Lina Iyer (2018-10-10 17:29:58)
>> QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
>> domain can wakeup the SoC, when interrupts and GPIOs are routed to its
>> interrupt controller. Only select GPIOs that are deemed wakeup capable
>> are routed to specific PDC pins. During low power state, the pinmux
>> interrupt controller may be non-functional but the PDC would be. The PDC
>> can detect the wakeup GPIO is triggered and bring the TLMM to an
>> operational state.
>>
>> Interrupts that are level triggered will be detected at the TLMM when
>> the controller becomes operational. Edge interrupts however need to be
>> replayed again.
>>
>> Request the corresponding PDC IRQ, when the GPIO is requested as an IRQ,
>> but keep it disabled. During suspend, we can enable the PDC IRQ instead
>> of the GPIO IRQ, which may or not be detected.
>>
I should have removed this paragraph. This is not relevant to the
$SUBJECT patch anymore.

>> Signed-off-by: Lina Iyer <ilina@codeaurora.org>
>> ---
>
> So we may need
>to change #4 up above to always allocate the irq from PDC and somehow
>communicate that the irq is wakeup capable in PDC back to the TLMM
>driver so TLMM knows to keep the irq masked in the hardware forever.
>That way it can't cause the summary irq line to trigger in addition to
>the PDC one. Given that we have allocation hooks with domain hierarchy
>it may be easy enough to remove TLMM irqs from the summary irq domain
>when they can be allocated from the parent PDC domain.
>
This is exactly what this patch does. We dont want to use the GPIO IRQ
and the summary line and instead always use the PDC for all wakeup
capable GPIO IRQs. The configuration of the IRQ registers is avoided
here and therefore the TLMM never triggers the summary line at the GIC
for GPIOs that are specified in the DT. PDC is the only way to detect
the GPIO interrupt whether the system is active or not. That way we
avoid any mishaps in handshakes between the two interrupts.

Thanks,
Lina