From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCE37C46462 for ; Tue, 20 Nov 2018 19:42:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3EC4220870 for ; Tue, 20 Nov 2018 19:41:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3EC4220870 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727094AbeKUGMR (ORCPT ); Wed, 21 Nov 2018 01:12:17 -0500 Received: from mga04.intel.com ([192.55.52.120]:30066 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726289AbeKUGMR (ORCPT ); Wed, 21 Nov 2018 01:12:17 -0500 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Nov 2018 11:41:30 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,258,1539673200"; d="scan'208";a="92680417" Received: from tassilo.jf.intel.com (HELO tassilo.localdomain) ([10.7.201.126]) by orsmga006.jf.intel.com with ESMTP; 20 Nov 2018 11:41:30 -0800 Received: by tassilo.localdomain (Postfix, from userid 1000) id EBAF93018C4; Tue, 20 Nov 2018 11:41:29 -0800 (PST) Date: Tue, 20 Nov 2018 11:41:29 -0800 From: Andi Kleen To: Kyle Huey Cc: Kan Liang , "Peter Zijlstra (Intel)" , Ingo Molnar , Robert O'Callahan , Alexander Shishkin , Arnaldo Carvalho de Melo , Jiri Olsa , Linus Torvalds , Stephane Eranian , Thomas Gleixner , Vince Weaver , acme@kernel.org, open list Subject: Re: [REGRESSION] x86, perf: counter freezing breaks rr Message-ID: <20181120194129.GC13936@tassilo.jf.intel.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > rr, a userspace record and replay debugger[0], uses the PMU interrupt > (PMI) to stop a program during replay to inject asynchronous events > such as signals. With perf counter freezing enabled we are reliably > seeing perf event overcounts during replay. This behavior is easily It's hard to see how it could over count since the PMU freezes earlier than the PMI with freezing. So it should count less. Did you mean under count? > Given that we're already at rc3, and that this renders rr unusable, > we'd ask that counter freezing be disabled for the 4.20 release. The boot option should be good enough for the release? A reasonable future option would be to expose an option to disable it in the perf_event. Then rr could set it. -Andi