From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06C1BC43441 for ; Tue, 27 Nov 2018 16:58:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CF06D20828 for ; Tue, 27 Nov 2018 16:58:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CF06D20828 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731946AbeK1D5D (ORCPT ); Tue, 27 Nov 2018 22:57:03 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:42480 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730260AbeK1D5C (ORCPT ); Tue, 27 Nov 2018 22:57:02 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 75A5D32E5; Tue, 27 Nov 2018 08:58:31 -0800 (PST) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 44C343F59C; Tue, 27 Nov 2018 08:58:31 -0800 (PST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 1BA1F1AE0A0D; Tue, 27 Nov 2018 16:58:49 +0000 (GMT) Date: Tue, 27 Nov 2018 16:58:49 +0000 From: Will Deacon To: Masami Hiramatsu Cc: Steven Rostedt , Catalin Marinas , Naresh Kamboju , Mark Rutland , Ingo Molnar , Masami Hiramatsu , linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH] arm64: ftrace: Fix to enable syscall events on arm64 Message-ID: <20181127165848.GA19569@arm.com> References: <154333618522.27355.8094935453351562295.stgit@devbox> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <154333618522.27355.8094935453351562295.stgit@devbox> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Masami, On Wed, Nov 28, 2018 at 01:29:45AM +0900, Masami Hiramatsu wrote: > Since commit 4378a7d4be30 ("arm64: implement syscall wrappers") > introduced "__arm64_" prefix to all syscall wrapper symbols in > sys_call_table, syscall tracer can not find corresponding > metadata from syscall name. In the result, we have no syscall > ftrace events on arm64 kernel, and some bpf testcases are failed > on arm64. > > To fix this issue, this introduces custom > arch_syscall_match_sym_name() which skips first 8 bytes when > comparing the syscall and symbol names. > > Fixes: 4378a7d4be30 ("arm64: implement syscall wrappers") > Reported-by: Naresh Kamboju > Signed-off-by: Masami Hiramatsu > Cc: stable@vger.kernel.org > --- > arch/arm64/include/asm/ftrace.h | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/include/asm/ftrace.h b/arch/arm64/include/asm/ftrace.h > index caa955f10e19..a710f79db442 100644 > --- a/arch/arm64/include/asm/ftrace.h > +++ b/arch/arm64/include/asm/ftrace.h > @@ -56,6 +56,15 @@ static inline bool arch_trace_is_compat_syscall(struct pt_regs *regs) > { > return is_compat_task(); > } > + > +#define ARCH_HAS_SYSCALL_MATCH_SYM_NAME > + > +static inline bool arch_syscall_match_sym_name(const char *sym, > + const char *name) > +{ > + /* Since all syscall functions have __arm64_ prefix, we must skip it */ > + return !strcmp(sym + 8, name); > +} This looks fine to me, but I'm curious about whether this is supposed to work with compat syscalls as well, where the prefix is "__arm64_compat_". If we broadly follow the x86 lead, we'd have: return (!strncmp(sym, "__arm64_", 8) && !strcmp(sym + 8, name)) || (!strncmp(sym, "__arm64_compat_", 15) && !strcmp(sym + 15, name)); Do we need to handle compat (i.e. 32-bit) tasks here? Will