From: Andrew Lunn <andrew@lunn.ch>
To: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: "David S. Miller" <davem@davemloft.net>,
netdev@vger.kernel.org, Sekhar Nori <nsekhar@ti.com>,
linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org
Subject: Re: [PATCH] net: ethernet: ti: cpsw: allow to configure min tx packet size
Date: Wed, 28 Nov 2018 05:49:13 +0100 [thread overview]
Message-ID: <20181128044913.GB6730@lunn.ch> (raw)
In-Reply-To: <7a194258-2888-2268-42d1-27ac513a5c8a@ti.com>
> [1] https://e2e.ti.com/support/arm/sitara_arm/f/791/t/701669
Reading this, the interesting part is:
My guess would be that the driver would have to track the
configuration of the switch hardware to correctly pad the
frame.
Have you tried that?
Andrew
next prev parent reply other threads:[~2018-11-28 4:49 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-25 23:43 [PATCH] net: ethernet: ti: cpsw: allow to configure min tx packet size Grygorii Strashko
2018-11-26 2:27 ` Andrew Lunn
2018-11-28 1:27 ` Grygorii Strashko
2018-11-28 4:49 ` Andrew Lunn [this message]
2018-11-28 20:56 ` Grygorii Strashko
2018-11-28 22:02 ` Andrew Lunn
2018-11-28 22:43 ` Grygorii Strashko
2018-11-29 0:28 ` Andrew Lunn
2018-11-29 1:22 ` David Miller
2018-11-29 23:51 ` Grygorii Strashko
2018-11-29 13:05 ` Lad, Prabhakar
2018-11-29 12:24 ` David Laight
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