From: Joerg Roedel <joro@8bytes.org>
To: Lu Baolu <baolu.lu@linux.intel.com>
Cc: David Woodhouse <dwmw2@infradead.org>,
ashok.raj@intel.com, sanjay.k.kumar@intel.com,
jacob.jun.pan@intel.com, kevin.tian@intel.com,
yi.l.liu@intel.com, yi.y.sun@intel.com, peterx@redhat.com,
Jean-Philippe Brucker <jean-philippe.brucker@arm.com>,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
Jacob Pan <jacob.jun.pan@linux.intel.com>
Subject: Re: [PATCH v5 04/12] iommu/vt-d: Add 256-bit invalidation descriptor support
Date: Mon, 3 Dec 2018 14:48:56 +0100 [thread overview]
Message-ID: <20181203134856.lui4us4ejm4d5avz@8bytes.org> (raw)
In-Reply-To: <20181128035449.10226-5-baolu.lu@linux.intel.com>
On Wed, Nov 28, 2018 at 11:54:41AM +0800, Lu Baolu wrote:
> -
> - desc_page = alloc_pages_node(iommu->node, GFP_ATOMIC | __GFP_ZERO, 0);
> + /*
> + * Need two pages to accommodate 256 descriptors of 256 bits each
> + * if the remapping hardware supports scalable mode translation.
> + */
> + desc_page = alloc_pages_node(iommu->node, GFP_ATOMIC | __GFP_ZERO,
> + !!ecap_smts(iommu->ecap));
Same here, does the allocation really need GFP_ATOMIC?
> struct q_inval {
> raw_spinlock_t q_lock;
> - struct qi_desc *desc; /* invalidation queue */
> + void *desc; /* invalidation queue */
> int *desc_status; /* desc status */
> int free_head; /* first free entry */
> int free_tail; /* last free entry */
Why do you switch the pointer to void* ?
Joerg
next prev parent reply other threads:[~2018-12-03 13:49 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-28 3:54 [PATCH v5 00/12] iommu/vt-d: Add scalable mode support Lu Baolu
2018-11-28 3:54 ` [PATCH v5 01/12] iommu/vt-d: Enumerate the scalable mode capability Lu Baolu
2018-11-28 3:54 ` [PATCH v5 02/12] iommu/vt-d: Manage scalalble mode PASID tables Lu Baolu
2018-12-03 13:44 ` Joerg Roedel
2018-12-03 17:23 ` Liu, Yi L
2018-12-04 5:58 ` Lu Baolu
2018-12-05 15:50 ` Joerg Roedel
2018-12-06 1:13 ` Lu Baolu
2018-12-05 15:47 ` Joerg Roedel
2018-11-28 3:54 ` [PATCH v5 03/12] iommu/vt-d: Move page table helpers into header Lu Baolu
2018-11-28 3:54 ` [PATCH v5 04/12] iommu/vt-d: Add 256-bit invalidation descriptor support Lu Baolu
2018-12-03 13:48 ` Joerg Roedel [this message]
2018-12-03 17:23 ` Liu, Yi L
2018-12-04 6:13 ` Lu Baolu
2018-12-05 15:56 ` Joerg Roedel
2018-12-06 1:19 ` Lu Baolu
2018-11-28 3:54 ` [PATCH v5 05/12] iommu/vt-d: Reserve a domain id for FL and PT modes Lu Baolu
2018-11-28 3:54 ` [PATCH v5 06/12] iommu/vt-d: Add second level page table interface Lu Baolu
2018-11-28 3:54 ` [PATCH v5 07/12] iommu/vt-d: Setup pasid entry for RID2PASID support Lu Baolu
2018-11-28 3:54 ` [PATCH v5 08/12] iommu/vt-d: Pass pasid table to context mapping Lu Baolu
2018-11-28 3:54 ` [PATCH v5 09/12] iommu/vt-d: Setup context and enable RID2PASID support Lu Baolu
2018-11-28 3:54 ` [PATCH v5 10/12] iommu/vt-d: Add first level page table interface Lu Baolu
2018-11-28 3:54 ` [PATCH v5 11/12] iommu/vt-d: Shared virtual address in scalable mode Lu Baolu
2018-11-28 3:54 ` [PATCH v5 12/12] iommu/vt-d: Remove deferred invalidation Lu Baolu
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