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[46.139.12.213]) by smtp.gmail.com with ESMTPSA id s16sm478788wrt.77.2018.12.06.08.27.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 06 Dec 2018 08:27:05 -0800 (PST) Date: Thu, 6 Dec 2018 17:27:03 +0100 From: Ingo Molnar To: Borislav Petkov Cc: LKML , Tony Luck , X86 ML , linux-edac Subject: Re: [PATCH] x86/mce: Streamline MCE subsystem's naming Message-ID: <20181206162703.GA119163@gmail.com> References: <20181205141323.14995-1-bp@alien8.de> <20181205163037.GC109259@gmail.com> <20181205170006.GK29510@zn.tnic> <20181205180158.GA64770@gmail.com> <20181205190355.GP29510@zn.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181205190355.GP29510@zn.tnic> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Borislav Petkov wrote: > On Wed, Dec 05, 2018 at 07:01:58PM +0100, Ingo Molnar wrote: > > Oh - I thought we'd have arch/x86/mce/ or so? > > > > There's machine check events that are not tied to any particular CPU, > > correct? So this would be the right conceptual level - and it would also > > remove the somewhat redundant 'kernel' part. > > Well, all the MCE events reported are some way or the other tied to the > CPU and they're reported in the CPU's MCA banks so I think we want > > arch/x86/cpu/mce/ Well, *everything* the kernel does is in some way connected to a CPU, because we always execute the kernel on a CPU, still we have things like discrete PMUs and abstractions for other pieces of hardware that are not per CPU. So the real question is, is there a signifcant class of MCE events that are not tied to the reporting channel which is per CPU (-ish ...) MCA banks? Thanks, Ingo