From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1ABFBC65BB3 for ; Mon, 10 Dec 2018 11:54:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D624920821 for ; Mon, 10 Dec 2018 11:54:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="rmKhqxus" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D624920821 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727751AbeLJLx7 (ORCPT ); Mon, 10 Dec 2018 06:53:59 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:44730 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727680AbeLJLxj (ORCPT ); Mon, 10 Dec 2018 06:53:39 -0500 Received: by mail-wr1-f67.google.com with SMTP id z5so10127941wrt.11 for ; Mon, 10 Dec 2018 03:53:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/BsYwI4MGKscqtd4fapjUVq4zzWRiadQNZwYTiXxWLI=; b=rmKhqxusc9306yF/sibOGPtsKZ0YVA8oWcI/en0ytdLEkML8BGTwAPRHxDWEtWADjV AeMPrXrMY85YM1J9PexBK5r855XxbqYQDJ77rhBZ1QOB9//dULojVOTEMo5tyS4xqEd9 FOzq63vyhY21I+FhdGzSLcJTZgVI1nBKHtlhw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/BsYwI4MGKscqtd4fapjUVq4zzWRiadQNZwYTiXxWLI=; b=Fbyfv8As4/ibLXyVQM5ngAuuM9fqC4Ki8WRRt2nNwtYLggRhT08XKQ+efosqMFLPXd 7HZXfR3I4lGDIVEtQ9CWlNvAKB9cDArB+gOwchdorO1Yy5ysmHpr/so77btiprIYvjd+ LU5hJQFu+IPILSzdxtkjN51GeLURLeM52sjxCdSGUTY8DkJd72Ic0tKnH4OirbvWU5z9 Q2+zSFfdt/fq2Mnti0YVR7QqgC8mS6I6UxCLQVyulG3vQS9hrZ6294Zz1hIYgd8GtZzr nOTyguB6IvQqIVbVytEjD21XbUZHL1CxLy8Fy9A32bkhSbjaR0WQvKZbUtlOc1KFxt/p E4Bw== X-Gm-Message-State: AA+aEWZmxi6KgkLr37meZAAGkg6X5DoEf/m5eIHFI4YcA4TvU2/z095J 4U4jTlAu74RQwm9NelX5a+41tA== X-Google-Smtp-Source: AFSGD/X7XXMHhsDkTKBbBpvSsKxiSrvCFJENayMKWOvYt19DYtjdeJANN6bC0YMo0sro4IV6kHdeLg== X-Received: by 2002:adf:b592:: with SMTP id c18mr9513454wre.89.1544442817615; Mon, 10 Dec 2018 03:53:37 -0800 (PST) Received: from localhost.localdomain (ip-162-59.sn-213-198.clouditalia.com. [213.198.162.59]) by smtp.gmail.com with ESMTPSA id b16sm7869243wrm.41.2018.12.10.03.53.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Dec 2018 03:53:36 -0800 (PST) From: Jagan Teki To: Yong Deng , Mauro Carvalho Chehab , Maxime Ripard , Rob Herring , Mark Rutland , Chen-Yu Tsai , linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi , linux-amarula@amarulasolutions.com, Michael Trimarchi Cc: Jagan Teki Subject: [PATCH v3 5/6] arm64: dts: allwinner: a64: Add pinmux setting for CSI MCLK on PE1 Date: Mon, 10 Dec 2018 17:22:45 +0530 Message-Id: <20181210115246.8188-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181210115246.8188-1-jagan@amarulasolutions.com> References: <20181210115246.8188-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some camera modules have the SoC feeding a master clock to the sensor instead of having a standalone crystal. This clock signal is generated from the clock control unit and output from the CSI MCLK function of pin PE1. Add a pinmux setting for it for camera sensors to reference. Signed-off-by: Jagan Teki --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 89a0deb3fe6a..dd5740bc3fc9 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -538,6 +538,11 @@ function = "csi0"; }; + csi_mclk_pin: csi-mclk { + pins = "PE1"; + function = "csi0"; + }; + i2c0_pins: i2c0_pins { pins = "PH0", "PH1"; function = "i2c0"; -- 2.18.0.321.gffc6fa0e3