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[217.229.16.64]) by smtp.gmail.com with ESMTPSA id y4-v6sm2575766ejc.10.2018.12.12.02.42.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 12 Dec 2018 02:42:42 -0800 (PST) Date: Wed, 12 Dec 2018 11:42:41 +0100 From: Thierry Reding To: Alvaro Gamez Machado Cc: Rob Herring , Mark Rutland , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [RFC v2] pwm: Add Xilinx AXI Timer in PWM mode support Message-ID: <20181212104241.GA17654@ulmo> References: <20180322135316.19685-1-alvaro.gamez@hazent.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="0F1p//8PRICkK4MW" Content-Disposition: inline In-Reply-To: <20180322135316.19685-1-alvaro.gamez@hazent.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --0F1p//8PRICkK4MW Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Mar 22, 2018 at 02:53:16PM +0100, Alvaro Gamez Machado wrote: > This patch adds support for the IP core provided by Xilinx. > This IP core can function as a two independent timers, but also use both > counters as values for period and duty cycle of a PWM output. >=20 > There can be many instances of this IP in a design, but the first one of > them will be used to generate system's clock. If we were to use this driv= er > against the first timer instance found on the DT, we would expose it as a > PWM controller, and reconfiguring it will break the clock. >=20 > To avoid this we add an attribute pwm-outputs to this device declaration. > This new driver will fail to probe when pwm-outputs is different than 1. >=20 > We could use a boolean, but future versions of this IP core could impleme= nt > several PWM and counters, so when (if) this happens, we would only have to > adjust the pwm-outputs comparison to allow more than one PWM devices. >=20 > Signed-off-by: Alvaro Gamez Machado > --- >=20 > This is the second proposal on getting AXI Timer PWM capability into Linu= x.=20 > The other alternative, which was sent un June past year, didn't look for > pwm-output attribute, so in order not to kidnap control from > arch/microblaze/kernel/timer.c it used a different compatible string. Tha= t's > not wrong per se, but raises the question: can one piece of hardware have > two compatible strings depending on its intended use, rather than on the > nature of the hardware itself? >=20 > If there's interest in mainlining this or the proposal I sent last year, = I'd > be grateful to hear from the devicetree maintainers and maybe approve or > suggest any different aproach. >=20 > Best regards >=20 > drivers/pwm/Kconfig | 9 ++ > drivers/pwm/Makefile | 1 + > drivers/pwm/pwm-axi-timer.c | 204 ++++++++++++++++++++++++++++++++++++++= ++++++ > 3 files changed, 214 insertions(+) > create mode 100644 drivers/pwm/pwm-axi-timer.c Did any discussion regarding the above-mentioned issues ever ensue? How do you want to proceed? At the very least we'll need some sort of device tree binding for this driver, so perhaps start with a DT binding proposal and take it from there? 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