From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B048DC43387 for ; Wed, 26 Dec 2018 22:38:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8145B2054F for ; Wed, 26 Dec 2018 22:38:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1545863888; bh=cZrBJNO9c7ZwxX+w3ZA09INHzeT0L2t/JO+juTIbCM0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=abLs8vZv6ZcnTB95kpvsU41Z9JXXLPXgatzPo71maHEhRqVgrGFEPp0uwqly0NlnS aPigYp4scpOh62vnBfKro2EFIbHvHAD7BGnBCe8I/pJAMhtwDXGaGONcsw+wKKWHyc xD3D365romJPmKzHxpkAP88tNniZO8l8QACbaTVg= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728667AbeLZWiH (ORCPT ); Wed, 26 Dec 2018 17:38:07 -0500 Received: from mail.kernel.org ([198.145.29.99]:38290 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728627AbeLZWiE (ORCPT ); Wed, 26 Dec 2018 17:38:04 -0500 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 03B2C218E2; Wed, 26 Dec 2018 22:38:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1545863883; bh=cZrBJNO9c7ZwxX+w3ZA09INHzeT0L2t/JO+juTIbCM0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sNa2sY0j7mxADERZ0N+nH/KgLXo7Oo2dA5iVGnekpihh2oXAHBQjhLlD4pmCTlUsU 2HQdVU1O+oujc/+sn0RxquL+UQzfuUzgVuDV0eR1ubvYtoqqzsushCQ88SH+OfDKA/ ZFRxzLXp8vug2/QxZnQpBNayjtRFxOfc545LCBc0= From: Sasha Levin To: stable@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Anssi Hannula , Nicolas Ferre , Michal Simek , "David S . Miller" , Sasha Levin , netdev@vger.kernel.org Subject: [PATCH AUTOSEL 4.19 73/97] net: macb: fix random memory corruption on RX with 64-bit DMA Date: Wed, 26 Dec 2018 17:35:33 -0500 Message-Id: <20181226223557.149329-73-sashal@kernel.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181226223557.149329-1-sashal@kernel.org> References: <20181226223557.149329-1-sashal@kernel.org> MIME-Version: 1.0 X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Anssi Hannula [ Upstream commit e100a897bf9b19089e57f236f2398c9e0538900e ] 64-bit DMA addresses are split in upper and lower halves that are written in separate fields on GEM. For RX, bit 0 of the address is used as the ownership bit (RX_USED). When the RX_USED bit is unset the controller is allowed to write data to the buffer. The driver does not guarantee that the controller already sees the upper half when the RX_USED bit is cleared, possibly resulting in the controller writing an incoming frame to an address with an incorrect upper half and therefore possibly corrupting unrelated system memory. Fix that by adding the necessary DMA memory barrier between the writes. This corruption was observed on a ZynqMP based system. Fixes: fff8019a08b6 ("net: macb: Add 64 bit addressing support for GEM") Signed-off-by: Anssi Hannula Acked-by: Harini Katakam Tested-by: Claudiu Beznea Cc: Nicolas Ferre Cc: Michal Simek Signed-off-by: David S. Miller Signed-off-by: Sasha Levin --- drivers/net/ethernet/cadence/macb_main.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 240fd36b5074..2de9197df074 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -682,6 +682,11 @@ static void macb_set_addr(struct macb *bp, struct macb_dma_desc *desc, dma_addr_ if (bp->hw_dma_cap & HW_DMA_CAP_64B) { desc_64 = macb_64b_desc(bp, desc); desc_64->addrh = upper_32_bits(addr); + /* The low bits of RX address contain the RX_USED bit, clearing + * of which allows packet RX. Make sure the high bits are also + * visible to HW at that point. + */ + dma_wmb(); } #endif desc->addr = lower_32_bits(addr); -- 2.19.1