From: "Yang,Weijiang" <weijiang.yang@intel.com>
To: Liran Alon <liran.alon@oracle.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
"rkrcmar@redhat.com" <rkrcmar@redhat.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"mst@redhat.com" <mst@redhat.com>,
"Yu, Yu-cheng" <yu-cheng.yu@intel.com>,
"Zhang, Yi Z" <yi.z.zhang@intel.com>,
"hjl.tools@gmail.com" <hjl.tools@gmail.com>,
Zhang Yi Z <yi.z.zhang@linux.intel.com>
Subject: Re: [PATCH v1 3/8] kvm:vmx Enable loading CET state bit while guest CR4.CET is being set.
Date: Thu, 27 Dec 2018 14:07:59 +0800 [thread overview]
Message-ID: <20181227060759.GB14329@localhost.localdomain> (raw)
In-Reply-To: <9307C088-C8F8-4587-ABB4-3CADF2CC3117@oracle.com>
On Wed, Dec 26, 2018 at 04:52:38PM +0800, Liran Alon wrote:
Thanks Liran for pointing out the issues!
I'll fix them in next version.
>
>
> > On 26 Dec 2018, at 10:15, Yang Weijiang <weijiang.yang@intel.com> wrote:
> >
> > This bit controls whether guest CET states will be loaded on guest entry.
> >
> > Signed-off-by: Zhang Yi Z <yi.z.zhang@linux.intel.com>
> > Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> > ---
> > arch/x86/kvm/vmx.c | 19 +++++++++++++++++++
> > 1 file changed, 19 insertions(+)
> >
> > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> > index 7bbb8b26e901..25fa6bd2fb95 100644
> > --- a/arch/x86/kvm/vmx.c
> > +++ b/arch/x86/kvm/vmx.c
> > @@ -1045,6 +1045,8 @@ struct vcpu_vmx {
> >
> > bool req_immediate_exit;
> >
> > + bool vcpu_cet_on;
> > +
> > /* Support for PML */
> > #define PML_ENTITY_NUM 512
> > struct page *pml_pg;
> > @@ -5409,6 +5411,23 @@ static int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
> > return 1;
> > }
> >
> > + /*
> > + * When CET.CR4 is being set, it means we're enabling CET for
>
> You probably meant to write here CR4.CET.
>
> > + * the guest, then enable loading CET state bit in entry control.
> > + * Otherwise, clear loading CET bit to disable guest CET.
> > + */
> > + if (cr4 & X86_CR4_CET) {
> > + if (!to_vmx(vcpu)->vcpu_cet_on) {
> > + vmcs_set_bits(VM_ENTRY_CONTROLS,
> > + VM_ENTRY_LOAD_GUEST_CET_STATE);
> > + to_vmx(vcpu)->vcpu_cet_on = 1;
> > + }
> > + } else if (to_vmx(vcpu)->vcpu_cet_on) {
> > + vmcs_clear_bits(VM_ENTRY_CONTROLS,
> > + VM_ENTRY_LOAD_GUEST_CET_STATE);
> > + to_vmx(vcpu)->vcpu_cet_on = 0;
> > + }
> > +
> > if (to_vmx(vcpu)->nested.vmxon && !nested_cr4_valid(vcpu, cr4))
> > return 1;
> >
> > --
> > 2.17.1
> >
>
> I haven’t seen a patch in the series that modifies kvm_set_cr4() to verify CR4.CET is not set when CET is not reported as supported by CPUID.
> I think that is missing from the series.
>
> -Liran
>
>
next prev parent reply other threads:[~2018-12-27 6:03 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-26 8:15 [PATCH v1 0/8] This patch-set is to enable kvm Guest OS CET support Yang Weijiang
2018-12-26 8:15 ` [PATCH v1 1/8] kvm:vmx Introduce CET related VMCS field definitions Yang Weijiang
2019-01-02 18:09 ` Sean Christopherson
2018-12-26 8:15 ` [PATCH v1 2/8] kvm: Define CR4.CET[bit 23] (master enable bit) for guest OS Yang Weijiang
2018-12-26 8:15 ` [PATCH v1 3/8] kvm:vmx Enable loading CET state bit while guest CR4.CET is being set Yang Weijiang
2018-12-26 8:52 ` Liran Alon
2018-12-27 6:07 ` Yang,Weijiang [this message]
2018-12-26 8:15 ` [PATCH v1 4/8] kvm:vmx Pass through host CET related MSRs to Guest Yang Weijiang
2019-01-02 18:18 ` Sean Christopherson
2019-01-02 19:12 ` Jim Mattson
2018-12-26 8:15 ` [PATCH v1 5/8] kvm:x86 Enable MSR_IA32_XSS bit 11 and 12 for CET xsaves/xrstors Yang Weijiang
2019-01-02 18:24 ` Sean Christopherson
2019-01-02 19:19 ` Jim Mattson
2019-01-06 21:17 ` Yang Weijiang
2018-12-26 8:15 ` [PATCH v1 6/8] kvm:cpuid Add CPUID support for CET xsaves component query Yang Weijiang
2019-01-02 18:49 ` Sean Christopherson
2018-12-26 8:15 ` [PATCH v1 7/8] kvm:cpuid Fix xsaves area size calculation for CPUID.(EAX=0xD,ECX=1) Yang Weijiang
2019-01-02 18:54 ` Sean Christopherson
2018-12-26 8:15 ` [PATCH v1 8/8] kvm:cpuid Report CET SHSTK and IBT support in CPUID.(EAX=0x7,ECX=0) Yang Weijiang
2019-01-02 19:00 ` Sean Christopherson
2019-01-07 16:03 ` Paolo Bonzini
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