From: Andi Kleen <ak@linux.intel.com>
To: Wei Wang <wei.w.wang@intel.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
pbonzini@redhat.com, peterz@infradead.org, kan.liang@intel.com,
mingo@redhat.com, rkrcmar@redhat.com, like.xu@intel.com,
jannh@google.com, arei.gonglei@huawei.com
Subject: Re: [PATCH v4 10/10] KVM/x86/lbr: lazy save the guest lbr stack II
Date: Thu, 27 Dec 2018 12:52:58 -0800 [thread overview]
Message-ID: <20181227205258.GH25620@tassilo.jf.intel.com> (raw)
In-Reply-To: <1545816338-1171-11-git-send-email-wei.w.wang@intel.com>
Actually forgot one case.
In Arch Perfmon v4 the LBR freezing is also controlled through a GLOBAL_CTRL bit.
I didn't see any code handling that bit?
-Andi
next prev parent reply other threads:[~2018-12-27 20:53 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-26 9:25 [PATCH v4 00/10] Guest LBR Enabling Wei Wang
2018-12-26 9:25 ` [PATCH v4 01/10] perf/x86: fix the variable type of the LBR MSRs Wei Wang
2018-12-26 9:25 ` [PATCH v4 02/10] perf/x86: add a function to get the lbr stack Wei Wang
2018-12-26 9:25 ` [PATCH v4 03/10] KVM/x86: KVM_CAP_X86_GUEST_LBR Wei Wang
2018-12-26 9:25 ` [PATCH v4 04/10] KVM/x86: intel_pmu_lbr_enable Wei Wang
2019-01-02 16:33 ` Liang, Kan
2019-01-04 9:58 ` Wei Wang
2019-01-04 15:57 ` Liang, Kan
2019-01-05 10:09 ` Wei Wang
2019-01-07 14:22 ` Liang, Kan
2019-01-08 6:13 ` Wei Wang
2019-01-08 14:08 ` Liang, Kan
2019-01-09 1:54 ` Wei Wang
2019-01-02 23:26 ` Jim Mattson
2019-01-03 7:22 ` Wei Wang
2019-01-03 15:34 ` Jim Mattson
2019-01-03 17:18 ` Andi Kleen
2019-01-04 10:09 ` Wei Wang
2019-01-04 15:53 ` Jim Mattson
2019-01-05 10:15 ` Wang, Wei W
2018-12-26 9:25 ` [PATCH v4 05/10] KVM/x86: expose MSR_IA32_PERF_CAPABILITIES to the guest Wei Wang
2019-01-02 23:40 ` Jim Mattson
2019-01-03 8:00 ` Wei Wang
2019-01-03 15:25 ` Jim Mattson
2019-01-07 9:15 ` Wei Wang
2019-01-07 18:05 ` Jim Mattson
2019-01-07 18:20 ` Andi Kleen
2019-01-07 18:48 ` Jim Mattson
2019-01-07 20:14 ` Andi Kleen
2019-01-07 21:00 ` Jim Mattson
2019-01-08 7:53 ` Wei Wang
2019-01-08 17:19 ` Jim Mattson
2018-12-26 9:25 ` [PATCH v4 06/10] perf/x86: no counter allocation support Wei Wang
2018-12-26 9:25 ` [PATCH v4 07/10] KVM/x86/vPMU: Add APIs to support host save/restore the guest lbr stack Wei Wang
2018-12-26 9:25 ` [PATCH v4 08/10] perf/x86: save/restore LBR_SELECT on vCPU switching Wei Wang
2018-12-26 9:25 ` [PATCH v4 09/10] perf/x86: function to check lbr user callstack mode Wei Wang
2018-12-26 9:25 ` [PATCH v4 10/10] KVM/x86/lbr: lazy save the guest lbr stack Wei Wang
2018-12-27 20:51 ` Andi Kleen
2018-12-28 3:47 ` Wei Wang
2018-12-28 19:10 ` Andi Kleen
2018-12-27 20:52 ` Andi Kleen [this message]
2018-12-29 4:25 ` [PATCH v4 10/10] KVM/x86/lbr: lazy save the guest lbr stack II Wang, Wei W
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181227205258.GH25620@tassilo.jf.intel.com \
--to=ak@linux.intel.com \
--cc=arei.gonglei@huawei.com \
--cc=jannh@google.com \
--cc=kan.liang@intel.com \
--cc=kvm@vger.kernel.org \
--cc=like.xu@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peterz@infradead.org \
--cc=rkrcmar@redhat.com \
--cc=wei.w.wang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox