Re: General protection fault in `switch_mm_irqs_off()`

Lendacky, Thomas
2019-01-09T16:15:28Z

On 1/9/19 8:34 AM, Paul Menzel wrote:
> Dear Thomas,
>
>
> On 01/09/19 15:29, Lendacky, Thomas wrote:
>> On 1/9/19 7:35 AM, Paul Menzel wrote:
>
>>> On 01/09/19 14:16, Thomas Gleixner wrote:
>>>
>>>> On Wed, 9 Jan 2019, Paul Menzel wrote:
>>>>> I get the same with microcode updates applied.
>>>>>
>>>>> $ dmesg | grep 'microcode: CPU0: patch_level'
>>>>> [ 3.809210] microcode: CPU0: patch_level=0x0600063e
>>>>> $ sudo modprobe msr
>>>>> $ sudo ./wrmsr 0x49 0x1
>>>>> wrmsr: CPU 0 cannot set MSR 0x00000049 to 0x0000000000000001
>>>>>
>>>>>> Could you please post /proc/cpuinfo from such a boot as well?
>>>>
>>>> /proc/cpuinfo unfortunately does not contain the amd specific IBPB flag,
>>>> but the dmesg of the original report says:
>>>>
>>>> Spectre V2 : mitigation: Enabling conditional Indirect Branch Prediction Barrier
>>>>
>>>> which means, that the CPUID bit is set.
>>>>
>>>> Can you please provide the output of:
>>>>
>>>> cpuid -1 -l 0x80000008 -r
>>>>
>>>> On my AMD Opteron(TM) Processor 6276 with microcode 0x600063d loaded I get:
>>>>
>>>> 0x80000008 0x00: eax=0x00003030 ebx=0x00000000 ecx=0x0000500f edx=0x00000000
>>>>
>>>> EBX is 0, which means that X86_FEATURE_AMD_IBPB is not enabled. So the
>>>> kernel does not try to use the speculation control MSR (0x49).
>>>
>>> With CPUID 20180519, I get the output below with both microcode update versions.
>>>
>>> 0x600063d:
>>>
>>> $ sudo ./cpuid -1 -l 0x80000008 -r
>>> CPU:
>>> 0x80000008 0x00: eax=0x00003030 ebx=0x00000000 ecx=0x0000500f edx=0x00000000
>>>
>>> 0x600063e:
>>>
>>> $ sudo ./cpuid -1 -l 0x80000008 -r
>>> CPU:
>>> 0x80000008 0x00: eax=0x00003030 ebx=0x00000000 ecx=0x0000500f edx=0x00000000
>>
>> Hmmm... so ebx is 0 for both versions, so I'm not sure how IBPB is being
>> set. What's the CPUID output for 0x07 (cpuid -1 -l 0x07 -r)?
>
> $ sudo ./cpuid -1 -l 0x07 -r
> CPU:
> 0x00000007 0x00: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000

I'm confused then... the only way that I can see that the IBPB feature
can be set is if 0x80000008[EBX] bit 12 is set or if 0x07[EDX] bit 26 is
set - neither of which is the case. I must be missing something...

Thanks,
Tom

>
>
> Kind regards,
>
> Paul
>