Re: [PATCH v3 1/6] pinctrl: qcom: spmi-gpio: hardcode IRQ counts

Stephen Boyd
2019-01-11T22:01:01Z

Quoting Brian Masney (2019-01-09 17:12:53)
> @@ -1062,14 +1056,15 @@ static int pmic_gpio_remove(struct platform_device *pdev)
> return 0;
> }
>
> +/* data contains the number of GPIOs */
> static const struct of_device_id pmic_gpio_of_match[] = {
> - { .compatible = "qcom,pm8916-gpio" }, /* 4 GPIO's */
> - { .compatible = "qcom,pm8941-gpio" }, /* 36 GPIO's */
> - { .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */
> - { .compatible = "qcom,pmi8994-gpio" }, /* 10 GPIO's */
> - { .compatible = "qcom,pma8084-gpio" }, /* 22 GPIO's */
> - { .compatible = "qcom,pms405-gpio" }, /* 12 GPIO's, holes on 1 9 10 */
> - { .compatible = "qcom,spmi-gpio" }, /* Generic */
> + { .compatible = "qcom,pm8916-gpio", .data = (void *) 4 },
> + { .compatible = "qcom,pm8941-gpio", .data = (void *) 36 },
> + { .compatible = "qcom,pm8994-gpio", .data = (void *) 22 },
> + { .compatible = "qcom,pmi8994-gpio", .data = (void *) 10 },
> + { .compatible = "qcom,pma8084-gpio", .data = (void *) 22 },
> + /* pms405 has 12 GPIOs with holes on 1, 9, and 10 */
> + { .compatible = "qcom,pms405-gpio", .data = (void *) 12 },

We've been lazy and not been updating this file.

$ git grep "qcom,spmi-gpio"
arch/arm/boot/dts/qcom-pm8941.dtsi: compatible = "qcom,pm8941-gpio", "qcom,spmi-gpio";
arch/arm/boot/dts/qcom-pma8084.dtsi: compatible = "qcom,pma8084-gpio", "qcom,spmi-gpio";
arch/arm64/boot/dts/qcom/pm8005.dtsi: compatible = "qcom,pm8005-gpio", "qcom,spmi-gpio";
arch/arm64/boot/dts/qcom/pm8998.dtsi: compatible = "qcom,pm8998-gpio", "qcom,spmi-gpio";
arch/arm64/boot/dts/qcom/pmi8994.dtsi: compatible = "qcom,pmi8994-gpio", "qcom,spmi-gpio";
arch/arm64/boot/dts/qcom/pmi8998.dtsi: compatible = "qcom,pmi8998-gpio", "qcom,spmi-gpio";

So we'll need to add pm8005, pm8998, pmi8998 here with their pin counts
too to avoid breaking those devices with this patch.