From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 455F8C43387 for ; Tue, 15 Jan 2019 00:29:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 099FC20657 for ; Tue, 15 Jan 2019 00:29:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="auuk8dSV" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727494AbfAOA3b (ORCPT ); Mon, 14 Jan 2019 19:29:31 -0500 Received: from mail-pl1-f194.google.com ([209.85.214.194]:40953 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727439AbfAOA3a (ORCPT ); Mon, 14 Jan 2019 19:29:30 -0500 Received: by mail-pl1-f194.google.com with SMTP id u18so408407plq.7 for ; Mon, 14 Jan 2019 16:29:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=fDaHKh5KYWZh1WGO9lqDTCqn12CWxYXa8HG0kHa/imo=; b=auuk8dSVJK6fVK8KV3ejiLWKw90lrr4VrjQSxOUZYmBalSet1AYl+o1BYPf8SsSzAM 16jQpE6gyIb9pOr+zwfJPMDogNcUMOKgEh9T5uV/ZQOk9jaa8YFF0ukqWpYjA1Ck6HVO zW7t4nAjkPVvHOcSp8WRoFdQxfLSgZCsOELfQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=fDaHKh5KYWZh1WGO9lqDTCqn12CWxYXa8HG0kHa/imo=; b=To2aKeEjaXMC21tyLwoH/Uumde1pihjzUHvb48zwFckLtXY6MFSftlmEyswT/KJx4s RsdB+T5C2H2Ajb/v5P0n8vTDxaoVDdFUicLhYLCIRHUuBxaTrBMovM3xL1OD1zmBykfV k8eBHehcZeMCbCkbvyRfksPZDOImTjEhYVU2FEH4KoudQisGJ18qSt7XHSKW9Epiu9rg lHsr35Dr7sjIhQ5DWrB4XT2jEPlI/wLQLYyFM2GWYQwmiiKaJgT9SnL/bdHOoq0vdiIy zC+K9Zg3gnOTpbI8Zi/Z9eVJ4i+3Yf3zp11LgZDAKL/nGAMbElM7l8vRzGxGQPmaW7Hp bSnA== X-Gm-Message-State: AJcUukc3CO1wWikm4FBi7vRfQ+NFwY3o7Ku5EeDqlelCtnVIKo2RI0ow NSAH5KuMWKqrA9mp+HOsCf2kbg== X-Google-Smtp-Source: ALg8bN5OICt/qGkuBe6j4csytiIyYiKX2rvfbdjsAyyl+LNgsxt1c2Xdjk2q9GM1Y8s+qro6tJ60fg== X-Received: by 2002:a17:902:2c83:: with SMTP id n3mr1248166plb.104.1547512170032; Mon, 14 Jan 2019 16:29:30 -0800 (PST) Received: from localhost ([2620:15c:202:1:75a:3f6e:21d:9374]) by smtp.gmail.com with ESMTPSA id g11sm1777712pfo.139.2019.01.14.16.29.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 14 Jan 2019 16:29:29 -0800 (PST) Date: Mon, 14 Jan 2019 16:29:28 -0800 From: Matthias Kaehlcke To: Taniya Das Cc: "Rafael J. Wysocki" , Viresh Kumar , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Stephen Boyd , Rajendra Nayak , devicetree@vger.kernel.org, robh@kernel.org, skannan@codeaurora.org, linux-arm-msm@vger.kernel.org, amit.kucheria@linaro.org, evgreen@google.com Subject: Re: [PATCH v2] cpufreq: qcom: Read voltage LUT and populate OPP Message-ID: <20190115002928.GO261387@google.com> References: <1547021248-27258-1-git-send-email-tdas@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1547021248-27258-1-git-send-email-tdas@codeaurora.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Taniya, On Wed, Jan 09, 2019 at 01:37:28PM +0530, Taniya Das wrote: > Add support to read the voltage look up table and populate OPP for all > corresponding CPUS for consumers like the energy model could use the > frequency and voltage from the OPP tables. > > Tested-by: Matthias Kaehlcke > Signed-off-by: Taniya Das > --- > drivers/cpufreq/qcom-cpufreq-hw.c | 33 +++++++++++++++++++++++++++++++-- > 1 file changed, 31 insertions(+), 2 deletions(-) > > diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c > index d83939a..18f90bb 100644 > --- a/drivers/cpufreq/qcom-cpufreq-hw.c > +++ b/drivers/cpufreq/qcom-cpufreq-hw.c > @@ -10,18 +10,21 @@ > #include > #include > #include > +#include > #include > > #define LUT_MAX_ENTRIES 40U > #define LUT_SRC GENMASK(31, 30) > #define LUT_L_VAL GENMASK(7, 0) > #define LUT_CORE_COUNT GENMASK(18, 16) > +#define LUT_VOLT GENMASK(11, 0) > #define LUT_ROW_SIZE 32 > #define CLK_HW_DIV 2 > > /* Register offsets */ > #define REG_ENABLE 0x0 > -#define REG_LUT_TABLE 0x110 > +#define REG_FREQ_LUT 0x110 > +#define REG_VOLT_LUT 0x114 > #define REG_PERF_STATE 0x920 > > static unsigned long cpu_hw_rate, xo_rate; > @@ -75,6 +78,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *dev, > void __iomem *base) > { > u32 data, src, lval, i, core_count, prev_cc = 0, prev_freq = 0, freq; > + u32 volt; > unsigned int max_cores = cpumask_weight(policy->cpus); > struct cpufreq_frequency_table *table; > > @@ -83,11 +87,16 @@ static int qcom_cpufreq_hw_read_lut(struct device *dev, > return -ENOMEM; > > for (i = 0; i < LUT_MAX_ENTRIES; i++) { > - data = readl_relaxed(base + REG_LUT_TABLE + i * LUT_ROW_SIZE); > + data = readl_relaxed(base + REG_FREQ_LUT + > + i * LUT_ROW_SIZE); > src = FIELD_GET(LUT_SRC, data); > lval = FIELD_GET(LUT_L_VAL, data); > core_count = FIELD_GET(LUT_CORE_COUNT, data); > > + data = readl_relaxed(base + REG_VOLT_LUT + > + i * LUT_ROW_SIZE); > + volt = FIELD_GET(LUT_VOLT, data) * 1000; > + > if (src) > freq = xo_rate * lval / 1000; > else > @@ -98,6 +107,8 @@ static int qcom_cpufreq_hw_read_lut(struct device *dev, > table[i].frequency = CPUFREQ_ENTRY_INVALID; > } else { > table[i].frequency = freq; > + dev_pm_opp_add(get_cpu_device(policy->cpu), > + freq * 1000, volt); > dev_dbg(dev, "index=%d freq=%d, core_count %d\n", i, > freq, core_count); > } > @@ -116,6 +127,8 @@ static int qcom_cpufreq_hw_read_lut(struct device *dev, > if (prev_cc != max_cores) { > prev->frequency = prev_freq; > prev->flags = CPUFREQ_BOOST_FREQ; > + dev_pm_opp_add(get_cpu_device(policy->cpu), > + prev_freq * 1000, volt); > } > > break; > @@ -127,6 +140,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *dev, > > table[i].frequency = CPUFREQ_TABLE_END; > policy->freq_table = table; > + dev_pm_opp_set_sharing_cpus(get_cpu_device(policy->cpu), policy->cpus); > > return 0; > } > @@ -159,10 +173,18 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) > struct device *dev = &global_pdev->dev; > struct of_phandle_args args; > struct device_node *cpu_np; > + struct device *cpu_dev; > struct resource *res; > void __iomem *base; > int ret, index; > > + cpu_dev = get_cpu_device(policy->cpu); > + if (!cpu_dev) { > + pr_err("%s: failed to get cpu%d device\n", __func__, > + policy->cpu); > + return -ENODEV; > + } > + > cpu_np = of_cpu_device_node_get(policy->cpu); > if (!cpu_np) > return -EINVAL; > @@ -205,6 +227,12 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) > goto error; > } > > + ret = dev_pm_opp_get_opp_count(cpu_dev); > + if (ret <= 0) { > + dev_err(cpu_dev, "OPP table is not ready\n"); > + goto error; > + } > + > policy->fast_switch_possible = true; > > return 0; > @@ -217,6 +245,7 @@ static int qcom_cpufreq_hw_cpu_exit(struct cpufreq_policy *policy) > { > void __iomem *base = policy->driver_data - REG_PERF_STATE; > > + dev_pm_opp_remove_all_dynamic(&global_pdev->dev); > kfree(policy->freq_table); > devm_iounmap(&global_pdev->dev, base); With this patch I get the following message on a SDM845 platform: [ 0.847515] cpu cpu0: _opp_is_duplicate: duplicate OPPs detected. Existing: freq: 1766400000, volt: 804000, enabled: 1. New: freq: 1766400000, volt: 804000, enabled: 1 A LUT that doesn't end with a boost frequency isn't handled properly. The below patch fixes this. Cheers Matthias >From 481d7d6b190285c95f20e9e1b5ccd5c6b9910a0d Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Mon, 14 Jan 2019 15:54:54 -0800 Subject: [PATCH] cpufreq: qcom-hw: Don't add duplicate OPPs Signed-off-by: Matthias Kaehlcke --- drivers/cpufreq/qcom-cpufreq-hw.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c index 41557329777e5a..314c8d29276b5e 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -103,15 +103,14 @@ static int qcom_cpufreq_hw_read_lut(struct device *dev, else freq = cpu_hw_rate / 1000; - /* Ignore boosts in the middle of the table */ - if (core_count != max_cores) { - table[i].frequency = CPUFREQ_ENTRY_INVALID; - } else { + if ((freq != prev_freq) && (core_count == max_cores)) { table[i].frequency = freq; dev_pm_opp_add(get_cpu_device(policy->cpu), - freq * 1000, volt); + freq * 1000, volt); dev_dbg(dev, "index=%d freq=%d, core_count %d\n", i, freq, core_count); + } else { + table[i].frequency = CPUFREQ_ENTRY_INVALID; } /*