Re: [PATCH v3 6/6] dt-bindings: fpga: Add bindings for ZynqMP fpga driver

Rob Herring
2019-02-22T20:30:54Z

On Wed, Jan 23, 2019 at 2:46 PM Nava kishore Manne <navam@xilinx.com> wrote:
>
> Hi Rob,
>
>
>
> Thanks for providing the comments...

Please fix your mailer to send plain text emails to mail lists.

> > -----Original Message-----
>
> > From: Rob Herring [mailto:robh@kernel.org]
>
> > Sent: Monday, January 21, 2019 9:19 PM
>
> > To: Nava kishore Manne <navam@xilinx.com>
>
> > Cc: mark.rutland@arm.com; Michal Simek <michals@xilinx.com>; Rajan Vaja
>
> > <RAJANV@xilinx.com>; linux-arm-kernel@lists.infradead.org; linux-
>
> > kernel@vger.kernel.org; devicetree@vger.kernel.org; Jolly Shah
>
> > <JOLLYS@xilinx.com>; chinnikishore369@gmail.com
>
> > Subject: Re: [PATCH v3 6/6] dt-bindings: fpga: Add bindings for ZynqMP fpga
>
> > driver
>
> >
>
> > On Mon, Jan 21, 2019 at 11:08:35PM +0530, Nava kishore Manne wrote:
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> > > Add documentation to describe Xilinx ZynqMP fpga driver bindings.
>
> > >
>
> > > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
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> > > ---
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> > > Changes for v3:
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> > > -Removed PCAP as a child node to the FW and Created
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> > > an independent node since PCAP driver is a consumer
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> > > not a provider.
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> > >
>
> > > .../bindings/fpga/xlnx,zynqmp-pcap-fpga.txt | 13 +++++++++++++
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> > > 1 file changed, 13 insertions(+)
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> > > create mode 100644
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> > > Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
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> > >
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> > > diff --git
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> > > a/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
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> > > b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
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> > > new file mode 100644
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> > > index 000000000000..1f6f58872311
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> > > --- /dev/null
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> > > +++ b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
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> > > @@ -0,0 +1,13 @@
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> > > +Device Tree zynqmp-fpga bindings for the Zynq Ultrascale+ MPSoC
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> > > +controlled using ZynqMP SoC firmware interface For Bitstream
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> > > +configuration on ZynqMp Soc uses processor configuration
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> > > +port(PCAP) to configure the programmable logic(PL) through PS by
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> > > +using FW interface.
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> > > +
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> > > +Required properties:
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> > > +- compatible: should contain "xlnx,zynqmp-pcap-fpga"
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> > > +
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> > > +Example:
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> > > + zynqmp_pcap: pcap {
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> > > + compatible = "xlnx,zynqmp-pcap-fpga";
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> > > + };
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> >
>
> > There's no need for a DT node. Just make the firware driver create a platform
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> > device for pcap.
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> >
>
>
>
> This driver being used by the FPGA manager framework(fpga-region) to apply overlay's so this node is needed AFAIK.

The binding says nothing about child nodes and what they are. Please
define that.

Rob