Re: [LINUX PATCH v12 3/3] mtd: rawnand: arasan: Add support for Arasan NAND Flash Controller

kbuild test robot
2018-11-09T23:04:34Z

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Hi Naga,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on mtd/nand/next]
[also build test WARNING on v4.20-rc1 next-20181109]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/Naga-Sureshkumar-Relli/dt-bindings-mtd-arasan-Add-device-tree-binding-documentation/20181110-034106
base: git://git.infradead.org/linux-mtd.git nand/next
config: sh-allyesconfig (attached as .config)
compiler: sh4-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=sh

All warnings (new ones prefixed by >>):

In file included from include/linux/scatterlist.h:9:0,
from include/linux/dma-mapping.h:11,
from drivers/mtd//nand/raw/arasan_nand.c:12:
drivers/mtd//nand/raw/arasan_nand.c: In function 'anfc_rw_dma_op':
>> drivers/mtd//nand/raw/arasan_nand.c:353:16: warning: right shift count >= width of type [-Wshift-count-overflow]
writel((paddr >> 32), nfc->base + DMA_ADDR1_OFST);
^
arch/sh/include/asm/io.h:31:77: note: in definition of macro '__raw_writel'
#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
^
arch/sh/include/asm/io.h:46:62: note: in expansion of macro 'ioswabl'
#define writel_relaxed(v,c) ((void)__raw_writel((__force u32)ioswabl(v),c))
^~~~~~~
arch/sh/include/asm/io.h:56:32: note: in expansion of macro 'writel_relaxed'
#define writel(v,a) ({ wmb(); writel_relaxed((v),(a)); })
^~~~~~~~~~~~~~
>> drivers/mtd//nand/raw/arasan_nand.c:353:2: note: in expansion of macro 'writel'
writel((paddr >> 32), nfc->base + DMA_ADDR1_OFST);
^~~~~~

vim +353 drivers/mtd//nand/raw/arasan_nand.c

325
326 static void anfc_rw_dma_op(struct mtd_info *mtd, u8 *buf, int len,
327 bool do_read, u32 prog, int pktcount, int pktsize)
328 {
329 dma_addr_t paddr;
330 struct nand_chip *chip = mtd_to_nand(mtd);
331 struct anfc_nand_controller *nfc = to_anfc(chip->controller);
332 struct anfc_nand_chip *achip = to_anfc_nand(chip);
333 u32 eccintr = 0, dir;
334
335 if (pktsize == 0)
336 pktsize = len;
337
338 anfc_setpktszcnt(nfc, pktsize, pktcount);
339
340 if (!achip->strength)
341 eccintr = MBIT_ERROR;
342
343 if (do_read)
344 dir = DMA_FROM_DEVICE;
345 else
346 dir = DMA_TO_DEVICE;
347 paddr = dma_map_single(nfc->dev, buf, len, dir);
348 if (dma_mapping_error(nfc->dev, paddr)) {
349 dev_err(nfc->dev, "Read buffer mapping error");
350 return;
351 }
352 writel(paddr, nfc->base + DMA_ADDR0_OFST);
> 353 writel((paddr >> 32), nfc->base + DMA_ADDR1_OFST);
354 anfc_enable_intrs(nfc, (XFER_COMPLETE | eccintr));
355 writel(prog, nfc->base + PROG_OFST);
356 anfc_wait_for_event(nfc);
357 dma_unmap_single(nfc->dev, paddr, len, dir);
358 }
359

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