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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id u109sm925002otb.8.2019.01.30.12.02.18 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 30 Jan 2019 12:02:18 -0800 (PST) Date: Wed, 30 Jan 2019 14:02:18 -0600 From: Rob Herring To: Jorge Ramirez-Ortiz Cc: gregkh@linuxfoundation.org, mark.rutland@arm.com, kishon@ti.com, jackp@codeaurora.org, andy.gross@linaro.org, swboyd@chromium.org, shawn.guo@linaro.org, vkoul@kernel.org, bjorn.andersson@linaro.org, khasim.mohammed@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings Message-ID: <20190130200218.GB5908@bogus> References: <1548761715-4004-1-git-send-email-jorge.ramirez-ortiz@linaro.org> <1548761715-4004-2-git-send-email-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1548761715-4004-2-git-send-email-jorge.ramirez-ortiz@linaro.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jan 29, 2019 at 12:35:14PM +0100, Jorge Ramirez-Ortiz wrote: > Binding description for Qualcomm's Synopsys 1.0.0 super-speed PHY > controller embedded in QCS404. > > Based on Sriharsha Allenki's original > definitions. > > Signed-off-by: Jorge Ramirez-Ortiz > --- > .../devicetree/bindings/usb/qcom,usb-ssphy.txt | 73 ++++++++++++++++++++++ > 1 file changed, 73 insertions(+) > create mode 100644 Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > > diff --git a/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > new file mode 100644 > index 0000000..8ef6e39 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > @@ -0,0 +1,73 @@ > +Qualcomm Synopsys 1.0.0 SS phy controller > +=========================================== > + > +Synopsys 1.0.0 ss phy controller supports SS usb connectivity on Qualcomm > +chipsets > + > +Required properties: > + > +- compatible: > + Value type: > + Definition: Should contain "qcom,usb-ssphy". This is in no way specific enough. > + > +- reg: > + Value type: > + Definition: USB PHY base address and length of the register map. > + > +- #phy-cells: > + Value type: > + Definition: Should be 0. See phy/phy-bindings.txt for details. > + > +- clocks: > + Value type: > + Definition: See clock-bindings.txt section "consumers". List of > + three clock specifiers for reference, phy core and > + pipe clocks. > + > +- clock-names: > + Value type: > + Definition: Names of the clocks in 1-1 correspondence with the "clocks" > + property. Must contain "ref", "phy" and "pipe". > + > +- vdd-supply: > + Value type: > + Definition: phandle to the regulator VDD supply node. > + > +- vdda1p8-supply: > + Value type: > + Definition: phandle to the regulator 1.8V supply node. > + > + > +Optional child nodes: > + > +- vbus-supply: > + Value type: > + Definition: phandle to the VBUS supply node. Does the phy actually get supplied by Vbus? If not, then Vbus supply should be defined in a USB connector node. > + > +- resets: > + Value type: > + Definition: See reset.txt section "consumers". PHY reset specifiers > + for phy core and COR resets. COR or COM? Looks to me the order is reversed. > + > +- reset-names: > + Value type: > + Definition: Names of the resets in 1-1 correspondence with the "resets" > + property. Must contain "com" and "phy". > + > +Example: > + > +usb3_phy: phy@78000 { usb3-phy@... > + compatible = "qcom,usb-ssphy"; > + reg = <0x78000 0x400>; > + #phy-cells = <0>; > + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, > + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, > + <&gcc GCC_USB3_PHY_PIPE_CLK>; > + clock-names = "ref", "phy", "pipe"; > + resets = <&gcc GCC_USB3_PHY_BCR>, > + <&gcc GCC_USB3PHY_PHY_BCR>; > + reset-names = "com", "phy"; > + vdd-supply = <&vreg_l3_1p05>; > + vdda1p8-supply = <&vreg_l5_1p8>; > + vbus-supply = <&usb3_vbus_reg>; > +}; > -- > 2.7.4 >