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[217.229.16.64]) by smtp.gmail.com with ESMTPSA id t4sm12971321wrb.64.2019.02.04.00.18.30 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 04 Feb 2019 00:18:30 -0800 (PST) Date: Mon, 4 Feb 2019 09:18:29 +0100 From: Thierry Reding To: Dmitry Osipenko Cc: Sowjanya Komatineni , Jonathan Hunter , Mantravadi Karthik , Shardar Mohammed , Timo Alho , "linux-tegra@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-i2c@vger.kernel.org" Subject: Re: [PATCH V9 3/5] i2c: tegra: Add DMA support Message-ID: <20190204081829.GC19087@ulmo> References: <1549040867-18149-1-git-send-email-skomatineni@nvidia.com> <1549040867-18149-3-git-send-email-skomatineni@nvidia.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="uXxzq0nDebZQVNAZ" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --uXxzq0nDebZQVNAZ Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sun, Feb 03, 2019 at 07:48:09PM +0300, Dmitry Osipenko wrote: > 02.02.2019 21:32, Sowjanya Komatineni =D0=BF=D0=B8=D1=88=D0=B5=D1=82: > >>> This patch adds DMA support for Tegra I2C. > >>> > >>> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for=20 > >>> transfer size of the max FIFO depth and DMA mode is used for transfer= =20 > >>> size higher than max FIFO depth to save CPU overhead. > >>> > >>> PIO mode needs full intervention of CPU to fill or empty FIFO's and= =20 > >>> also need to service multiple data requests interrupt for the same=20 > >>> transaction. This adds delay between data bytes of the same transfer= =20 > >>> when CPU is fully loaded and some slave devices has internal timeout= =20 > >>> for no bus activity and stops transaction to avoid bus hang. DMA mode= =20 > >>> is helpful in such cases. > >>> > >>> DMA mode is also helpful for Large transfers during downloading or=20 > >>> uploading FW over I2C to some external devices. > >>> > >>> Signed-off-by: Sowjanya Komatineni > >>> --- > >> > >> > >>> +static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev) { > >>> + struct dma_chan *dma_chan; > >>> + u32 *dma_buf; > >>> + dma_addr_t dma_phys; > >>> + int err =3D 0; > >>> + > >>> + if (!IS_ENABLED(CONFIG_TEGRA20_APB_DMA)) > >>> + return -ENODEV; > >> > >> Another detail is that we need to keep older kernels working on > >> T186+ after its device-tree will get the "dmas" property, > >> device-tree changes shall be backwards-compatible with older > >> kernels. Hence we need to check that platform actually wants the > >> APB DMA driver, otherwise T186+ will be failing with -EPROBE_DEFER. > >=20 > > Yes, that will be a separate patch later for adding DMA support for > > Tegra186 and later chips once we check on GPCDMA upstream > >=20 > >=20 >=20 > Sure, and there is a requirement in upstream to keep older kernel > versions working with the later device-tree updates, as I pointed > above. Please include the ".has_apb_dma checking" that I'm suggesting > into the next version. I don't think that's true. The requirement is for the device-tree ABI to remain stable, but that technically only requires that kernel updates do not require a DTB update. The assumption on which this is based is that the DTB may be shipping in read-only storage, like it used to fairly commonly in the distant past. Conversely, if you update the DTB the assumption is that you can also update the kernel, so the compatibility doesn't need to go that way. That said, I think what you're proposing here makes sense and is pretty trivial, so might as well add it at this time. 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