From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7076C282CB for ; Fri, 8 Feb 2019 17:35:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6D5292146E for ; Fri, 8 Feb 2019 17:35:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=bgdev-pl.20150623.gappssmtp.com header.i=@bgdev-pl.20150623.gappssmtp.com header.b="15aH7i8i" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728292AbfBHRf5 (ORCPT ); Fri, 8 Feb 2019 12:35:57 -0500 Received: from mail-wm1-f66.google.com ([209.85.128.66]:52447 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728256AbfBHRfs (ORCPT ); Fri, 8 Feb 2019 12:35:48 -0500 Received: by mail-wm1-f66.google.com with SMTP id m1so4367478wml.2 for ; Fri, 08 Feb 2019 09:35:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/0z1of7/QDsVE2JoIw+5LkRJ/UT4aPISepSTadwOIBI=; b=15aH7i8iwBEW+q46W6sOef/sv6KROYdNZL7QXmEi3t/DCR1T8N/hEvcFWCIWbsPxNo Ep9qjwPVNz3aRZIsUGntxXJZ6VunP26HDfLv485TQMrcs87fu6lVySAKuqh5HNZ+3Qao TQDfaSkSrEkYLBvFGdMNzV4KZzQO4KDzQzDMiyl8VihgbjIeDYPlNk1fO8lzL4e9/dld PKNks9fQKKkrTkFQvY1vh/XkSPvaIP0MiHD6I8lcyL0wQjQDBsYwk/6l6FVDBmHRPj58 8SVFLo/GynAfe8jLTZnQ+656L04iMCyMUw4HwQcUdTLXJ108ULq6NxSLk8djg3/V2EAs yKNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/0z1of7/QDsVE2JoIw+5LkRJ/UT4aPISepSTadwOIBI=; b=fS7xn+lhkp/1GFsgkG/D7WLBEbW8mj4rTstyCTivqslXA0ri+6YfTBH36nzp26/Bmo wYWa+EUOH7WH63akeilUmXvwpprXe8gFl/kEXXtfbyDTjL7i1VOYba4Lv4nQscMK36jH a4k4rzFP10mdQUWElGvvoTF5B/aF/bjTJRFC8ydiKX18a/44N/Ldzz1gyPHm0qObDY7/ 5Eqo+Jk6raBg21DuUGsEdMYrpWu2pHqiE/Oou/bjvkDvc7pO84MuYesf7VOs/0MaBD3J atFmW1eH/nIoBs/M8cFdrkwADsaMp7XQoJHcZkjC0bBI6McdEB8wi/sn8fe4G2bahl4X yKuQ== X-Gm-Message-State: AHQUAubwUaOJOKe3ToC3gQxaXxGzeGM1P4xMF2v3NrrnhQig1BZJLuZC GmU8Prwx8i+gWzI7T1J8YOrfzxICwgg= X-Google-Smtp-Source: AHgI3IbOcfxvZttRhCQpyzjbt1hsWLnRoJpC6u+xos2NkkLzXf3XTr1dWazw60lk/jYY5NpXC/09ug== X-Received: by 2002:a1c:7a16:: with SMTP id v22mr11562524wmc.131.1549647345519; Fri, 08 Feb 2019 09:35:45 -0800 (PST) Received: from debian-brgl.home ([2a01:cb1d:af:5b00:6d6c:8493:1ab5:dad7]) by smtp.gmail.com with ESMTPSA id p17sm354714wrv.59.2019.02.08.09.35.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 08 Feb 2019 09:35:44 -0800 (PST) From: Bartosz Golaszewski To: Sekhar Nori , Kevin Hilman , Daniel Lezcano , Rob Herring , Mark Rutland , Thomas Gleixner , David Lechner Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v2 33/33] ARM: davinci: remove intc related fields from davinci_soc_info Date: Fri, 8 Feb 2019 18:34:58 +0100 Message-Id: <20190208173458.4801-34-brgl@bgdev.pl> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190208173458.4801-1-brgl@bgdev.pl> References: <20190208173458.4801-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bartosz Golaszewski The fields related to the two davinci interrupt controllers are no longer used. Remove them. Signed-off-by: Bartosz Golaszewski --- arch/arm/mach-davinci/da830.c | 98 ------------------ arch/arm/mach-davinci/da850.c | 108 -------------------- arch/arm/mach-davinci/dm355.c | 3 - arch/arm/mach-davinci/dm365.c | 3 - arch/arm/mach-davinci/dm644x.c | 3 - arch/arm/mach-davinci/dm646x.c | 3 - arch/arm/mach-davinci/include/mach/common.h | 3 - 7 files changed, 221 deletions(-) diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 7ce0b5f1200d..63511f638ce4 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -624,101 +624,6 @@ const short da830_eqep1_pins[] __initconst = { -1 }; -/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ -static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = { - [IRQ_DA8XX_COMMTX] = 7, - [IRQ_DA8XX_COMMRX] = 7, - [IRQ_DA8XX_NINT] = 7, - [IRQ_DA8XX_EVTOUT0] = 7, - [IRQ_DA8XX_EVTOUT1] = 7, - [IRQ_DA8XX_EVTOUT2] = 7, - [IRQ_DA8XX_EVTOUT3] = 7, - [IRQ_DA8XX_EVTOUT4] = 7, - [IRQ_DA8XX_EVTOUT5] = 7, - [IRQ_DA8XX_EVTOUT6] = 7, - [IRQ_DA8XX_EVTOUT7] = 7, - [IRQ_DA8XX_CCINT0] = 7, - [IRQ_DA8XX_CCERRINT] = 7, - [IRQ_DA8XX_TCERRINT0] = 7, - [IRQ_DA8XX_AEMIFINT] = 7, - [IRQ_DA8XX_I2CINT0] = 7, - [IRQ_DA8XX_MMCSDINT0] = 7, - [IRQ_DA8XX_MMCSDINT1] = 7, - [IRQ_DA8XX_ALLINT0] = 7, - [IRQ_DA8XX_RTC] = 7, - [IRQ_DA8XX_SPINT0] = 7, - [IRQ_DA8XX_TINT12_0] = 7, - [IRQ_DA8XX_TINT34_0] = 7, - [IRQ_DA8XX_TINT12_1] = 7, - [IRQ_DA8XX_TINT34_1] = 7, - [IRQ_DA8XX_UARTINT0] = 7, - [IRQ_DA8XX_KEYMGRINT] = 7, - [IRQ_DA830_MPUERR] = 7, - [IRQ_DA8XX_CHIPINT0] = 7, - [IRQ_DA8XX_CHIPINT1] = 7, - [IRQ_DA8XX_CHIPINT2] = 7, - [IRQ_DA8XX_CHIPINT3] = 7, - [IRQ_DA8XX_TCERRINT1] = 7, - [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7, - [IRQ_DA8XX_C0_RX_PULSE] = 7, - [IRQ_DA8XX_C0_TX_PULSE] = 7, - [IRQ_DA8XX_C0_MISC_PULSE] = 7, - [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7, - [IRQ_DA8XX_C1_RX_PULSE] = 7, - [IRQ_DA8XX_C1_TX_PULSE] = 7, - [IRQ_DA8XX_C1_MISC_PULSE] = 7, - [IRQ_DA8XX_MEMERR] = 7, - [IRQ_DA8XX_GPIO0] = 7, - [IRQ_DA8XX_GPIO1] = 7, - [IRQ_DA8XX_GPIO2] = 7, - [IRQ_DA8XX_GPIO3] = 7, - [IRQ_DA8XX_GPIO4] = 7, - [IRQ_DA8XX_GPIO5] = 7, - [IRQ_DA8XX_GPIO6] = 7, - [IRQ_DA8XX_GPIO7] = 7, - [IRQ_DA8XX_GPIO8] = 7, - [IRQ_DA8XX_I2CINT1] = 7, - [IRQ_DA8XX_LCDINT] = 7, - [IRQ_DA8XX_UARTINT1] = 7, - [IRQ_DA8XX_MCASPINT] = 7, - [IRQ_DA8XX_ALLINT1] = 7, - [IRQ_DA8XX_SPINT1] = 7, - [IRQ_DA8XX_UHPI_INT1] = 7, - [IRQ_DA8XX_USB_INT] = 7, - [IRQ_DA8XX_IRQN] = 7, - [IRQ_DA8XX_RWAKEUP] = 7, - [IRQ_DA8XX_UARTINT2] = 7, - [IRQ_DA8XX_DFTSSINT] = 7, - [IRQ_DA8XX_EHRPWM0] = 7, - [IRQ_DA8XX_EHRPWM0TZ] = 7, - [IRQ_DA8XX_EHRPWM1] = 7, - [IRQ_DA8XX_EHRPWM1TZ] = 7, - [IRQ_DA830_EHRPWM2] = 7, - [IRQ_DA830_EHRPWM2TZ] = 7, - [IRQ_DA8XX_ECAP0] = 7, - [IRQ_DA8XX_ECAP1] = 7, - [IRQ_DA8XX_ECAP2] = 7, - [IRQ_DA830_EQEP0] = 7, - [IRQ_DA830_EQEP1] = 7, - [IRQ_DA830_T12CMPINT0_0] = 7, - [IRQ_DA830_T12CMPINT1_0] = 7, - [IRQ_DA830_T12CMPINT2_0] = 7, - [IRQ_DA830_T12CMPINT3_0] = 7, - [IRQ_DA830_T12CMPINT4_0] = 7, - [IRQ_DA830_T12CMPINT5_0] = 7, - [IRQ_DA830_T12CMPINT6_0] = 7, - [IRQ_DA830_T12CMPINT7_0] = 7, - [IRQ_DA830_T12CMPINT0_1] = 7, - [IRQ_DA830_T12CMPINT1_1] = 7, - [IRQ_DA830_T12CMPINT2_1] = 7, - [IRQ_DA830_T12CMPINT3_1] = 7, - [IRQ_DA830_T12CMPINT4_1] = 7, - [IRQ_DA830_T12CMPINT5_1] = 7, - [IRQ_DA830_T12CMPINT6_1] = 7, - [IRQ_DA830_T12CMPINT7_1] = 7, - [IRQ_DA8XX_ARMCLKSTOPREQ] = 7, -}; - static struct map_desc da830_io_desc[] = { { .virtual = IO_VIRT, @@ -807,9 +712,6 @@ static const struct davinci_soc_info davinci_soc_info_da830 = { .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120, .pinmux_pins = da830_pins, .pinmux_pins_num = ARRAY_SIZE(da830_pins), - .intc_base = DA8XX_CP_INTC_BASE, - .intc_irq_prios = da830_default_priorities, - .intc_irq_num = DA830_N_CP_INTC_IRQ, .timer_info = &da830_timer_info, .emac_pdata = &da8xx_emac_pdata, }; diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 62a00fa94696..8a50956a9181 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -299,111 +299,6 @@ const short da850_vpif_display_pins[] __initconst = { -1 }; -/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ -static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { - [IRQ_DA8XX_COMMTX] = 7, - [IRQ_DA8XX_COMMRX] = 7, - [IRQ_DA8XX_NINT] = 7, - [IRQ_DA8XX_EVTOUT0] = 7, - [IRQ_DA8XX_EVTOUT1] = 7, - [IRQ_DA8XX_EVTOUT2] = 7, - [IRQ_DA8XX_EVTOUT3] = 7, - [IRQ_DA8XX_EVTOUT4] = 7, - [IRQ_DA8XX_EVTOUT5] = 7, - [IRQ_DA8XX_EVTOUT6] = 7, - [IRQ_DA8XX_EVTOUT7] = 7, - [IRQ_DA8XX_CCINT0] = 7, - [IRQ_DA8XX_CCERRINT] = 7, - [IRQ_DA8XX_TCERRINT0] = 7, - [IRQ_DA8XX_AEMIFINT] = 7, - [IRQ_DA8XX_I2CINT0] = 7, - [IRQ_DA8XX_MMCSDINT0] = 7, - [IRQ_DA8XX_MMCSDINT1] = 7, - [IRQ_DA8XX_ALLINT0] = 7, - [IRQ_DA8XX_RTC] = 7, - [IRQ_DA8XX_SPINT0] = 7, - [IRQ_DA8XX_TINT12_0] = 7, - [IRQ_DA8XX_TINT34_0] = 7, - [IRQ_DA8XX_TINT12_1] = 7, - [IRQ_DA8XX_TINT34_1] = 7, - [IRQ_DA8XX_UARTINT0] = 7, - [IRQ_DA8XX_KEYMGRINT] = 7, - [IRQ_DA850_MPUADDRERR0] = 7, - [IRQ_DA8XX_CHIPINT0] = 7, - [IRQ_DA8XX_CHIPINT1] = 7, - [IRQ_DA8XX_CHIPINT2] = 7, - [IRQ_DA8XX_CHIPINT3] = 7, - [IRQ_DA8XX_TCERRINT1] = 7, - [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7, - [IRQ_DA8XX_C0_RX_PULSE] = 7, - [IRQ_DA8XX_C0_TX_PULSE] = 7, - [IRQ_DA8XX_C0_MISC_PULSE] = 7, - [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7, - [IRQ_DA8XX_C1_RX_PULSE] = 7, - [IRQ_DA8XX_C1_TX_PULSE] = 7, - [IRQ_DA8XX_C1_MISC_PULSE] = 7, - [IRQ_DA8XX_MEMERR] = 7, - [IRQ_DA8XX_GPIO0] = 7, - [IRQ_DA8XX_GPIO1] = 7, - [IRQ_DA8XX_GPIO2] = 7, - [IRQ_DA8XX_GPIO3] = 7, - [IRQ_DA8XX_GPIO4] = 7, - [IRQ_DA8XX_GPIO5] = 7, - [IRQ_DA8XX_GPIO6] = 7, - [IRQ_DA8XX_GPIO7] = 7, - [IRQ_DA8XX_GPIO8] = 7, - [IRQ_DA8XX_I2CINT1] = 7, - [IRQ_DA8XX_LCDINT] = 7, - [IRQ_DA8XX_UARTINT1] = 7, - [IRQ_DA8XX_MCASPINT] = 7, - [IRQ_DA8XX_ALLINT1] = 7, - [IRQ_DA8XX_SPINT1] = 7, - [IRQ_DA8XX_UHPI_INT1] = 7, - [IRQ_DA8XX_USB_INT] = 7, - [IRQ_DA8XX_IRQN] = 7, - [IRQ_DA8XX_RWAKEUP] = 7, - [IRQ_DA8XX_UARTINT2] = 7, - [IRQ_DA8XX_DFTSSINT] = 7, - [IRQ_DA8XX_EHRPWM0] = 7, - [IRQ_DA8XX_EHRPWM0TZ] = 7, - [IRQ_DA8XX_EHRPWM1] = 7, - [IRQ_DA8XX_EHRPWM1TZ] = 7, - [IRQ_DA850_SATAINT] = 7, - [IRQ_DA850_TINTALL_2] = 7, - [IRQ_DA8XX_ECAP0] = 7, - [IRQ_DA8XX_ECAP1] = 7, - [IRQ_DA8XX_ECAP2] = 7, - [IRQ_DA850_MMCSDINT0_1] = 7, - [IRQ_DA850_MMCSDINT1_1] = 7, - [IRQ_DA850_T12CMPINT0_2] = 7, - [IRQ_DA850_T12CMPINT1_2] = 7, - [IRQ_DA850_T12CMPINT2_2] = 7, - [IRQ_DA850_T12CMPINT3_2] = 7, - [IRQ_DA850_T12CMPINT4_2] = 7, - [IRQ_DA850_T12CMPINT5_2] = 7, - [IRQ_DA850_T12CMPINT6_2] = 7, - [IRQ_DA850_T12CMPINT7_2] = 7, - [IRQ_DA850_T12CMPINT0_3] = 7, - [IRQ_DA850_T12CMPINT1_3] = 7, - [IRQ_DA850_T12CMPINT2_3] = 7, - [IRQ_DA850_T12CMPINT3_3] = 7, - [IRQ_DA850_T12CMPINT4_3] = 7, - [IRQ_DA850_T12CMPINT5_3] = 7, - [IRQ_DA850_T12CMPINT6_3] = 7, - [IRQ_DA850_T12CMPINT7_3] = 7, - [IRQ_DA850_RPIINT] = 7, - [IRQ_DA850_VPIFINT] = 7, - [IRQ_DA850_CCINT1] = 7, - [IRQ_DA850_CCERRINT1] = 7, - [IRQ_DA850_TCERRINT2] = 7, - [IRQ_DA850_TINTALL_3] = 7, - [IRQ_DA850_MCBSP0RINT] = 7, - [IRQ_DA850_MCBSP0XINT] = 7, - [IRQ_DA850_MCBSP1RINT] = 7, - [IRQ_DA850_MCBSP1XINT] = 7, - [IRQ_DA8XX_ARMCLKSTOPREQ] = 7, -}; - static struct map_desc da850_io_desc[] = { { .virtual = IO_VIRT, @@ -739,9 +634,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = { .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120, .pinmux_pins = da850_pins, .pinmux_pins_num = ARRAY_SIZE(da850_pins), - .intc_base = DA8XX_CP_INTC_BASE, - .intc_irq_prios = da850_default_priorities, - .intc_irq_num = DA850_N_CP_INTC_IRQ, .timer_info = &da850_timer_info, .emac_pdata = &da8xx_emac_pdata, .sram_dma = DA8XX_SHARED_RAM_BASE, diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index a732f2ea1d9a..2352bcd359b4 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -706,9 +706,6 @@ static const struct davinci_soc_info davinci_soc_info_dm355 = { .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm355_pins, .pinmux_pins_num = ARRAY_SIZE(dm355_pins), - .intc_base = DAVINCI_ARM_INTC_BASE, - .intc_irq_prios = dm355_default_priorities, - .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm355_timer_info, .sram_dma = 0x00010000, .sram_len = SZ_32K, diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 79afde34cfbb..b86cab92a8de 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -723,9 +723,6 @@ static const struct davinci_soc_info davinci_soc_info_dm365 = { .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm365_pins, .pinmux_pins_num = ARRAY_SIZE(dm365_pins), - .intc_base = DAVINCI_ARM_INTC_BASE, - .intc_irq_prios = dm365_default_priorities, - .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm365_timer_info, .emac_pdata = &dm365_emac_pdata, .sram_dma = 0x00010000, diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 007d979d2d64..51b67bca634e 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -647,9 +647,6 @@ static const struct davinci_soc_info davinci_soc_info_dm644x = { .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm644x_pins, .pinmux_pins_num = ARRAY_SIZE(dm644x_pins), - .intc_base = DAVINCI_ARM_INTC_BASE, - .intc_irq_prios = dm644x_default_priorities, - .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm644x_timer_info, .emac_pdata = &dm644x_emac_pdata, .sram_dma = 0x00008000, diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index a643d78ad644..9638b327f638 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -587,9 +587,6 @@ static const struct davinci_soc_info davinci_soc_info_dm646x = { .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm646x_pins, .pinmux_pins_num = ARRAY_SIZE(dm646x_pins), - .intc_base = DAVINCI_ARM_INTC_BASE, - .intc_irq_prios = dm646x_default_priorities, - .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm646x_timer_info, .emac_pdata = &dm646x_emac_pdata, .sram_dma = 0x10010000, diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 14e0e1c40611..9526e5da0d33 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -58,9 +58,6 @@ struct davinci_soc_info { u32 pinmux_base; const struct mux_config *pinmux_pins; unsigned long pinmux_pins_num; - u32 intc_base; - u8 *intc_irq_prios; - unsigned long intc_irq_num; struct davinci_timer_info *timer_info; int gpio_type; u32 gpio_base; -- 2.20.1