From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.2 required=3.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,UNWANTED_LANGUAGE_BODY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75577C43381 for ; Thu, 14 Feb 2019 14:55:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 380A42229F for ; Thu, 14 Feb 2019 14:55:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=bgdev-pl.20150623.gappssmtp.com header.i=@bgdev-pl.20150623.gappssmtp.com header.b="ujanP9yA" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2439586AbfBNOxH (ORCPT ); Thu, 14 Feb 2019 09:53:07 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:34570 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2439550AbfBNOxE (ORCPT ); Thu, 14 Feb 2019 09:53:04 -0500 Received: by mail-wr1-f65.google.com with SMTP id f14so6831533wrg.1 for ; Thu, 14 Feb 2019 06:53:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gQeA7phzsYQZFK2JLuLMFYmsphbl1nQUs0emAC/KfyA=; b=ujanP9yAYW/maE4iuUf4Is1sCRY4LPb8Iq1w4VoGjOznBrt+E+BGUSM0HPEHz0diMu mSEwa4luSDOmPVZjMXbhJ9YJhhkj78mcJlCtfTbO7CJwO6XqgoQXCOf+sN/bmQwedJkH y4TT7mosmLY/mjdNzMglvKG2uvmZkwGYJqYIS0wvEaKUc6ObJdATs6WFq51OfxY0mflC Gc9NnYdEIKG/3B5wuLCevGWikWkrYy2kojWWZyBeg75BnV/DiaRIg8YHmFZJwWKYKXEw KfNkDHy6lymdRr4jNDxfMOOggTXpF5KvNexsJKJvpDeguWy7ZTxYL6g4E1+5MQHTwNF9 zbSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gQeA7phzsYQZFK2JLuLMFYmsphbl1nQUs0emAC/KfyA=; b=egb6MyMsyDuD+HIhFUoe73OTs258LEjn6qDH/sdWQ1z2Ifar0w50ehrFpdutJ2n0FV sIqGVqvq9EV0UQdcDW67IiS0Xj09UeBRjwzwBibtwsV6VYdYUUfYLsaRv+3AGVGDOcXA AhYEeKaxReyDxS612xDceUsR8YvvGVhwlvySJUTgn9Ra4ILos/kI/HHIU/DuOKdlmXu6 hIrIWqEGf0zrH1yC6flJMjzZWxT44pOtdKg5yY1PCNBtpeEMIjZTdT+VVrraNjirvwt5 86uPiDz0Ev+q9liPWPTUO0fbgFJXILDFn1u1I67FCI3f0c+JzkvoqPR49xoSZ3SIEybp 0HwA== X-Gm-Message-State: AHQUAub5IEelaaoxN8NF12RnR/TEQy19C3dvzmastGEY4iugdimalczg gfCxrTQE6JFx19BNUqVvMmyA4Q== X-Google-Smtp-Source: AHgI3IYx/+WKnypUDmH9edvHFdzMdkgOd7Y2iUX6zYfuL9xZX9RfUBU2RSJctZqVoHdi7oxQHSWEcA== X-Received: by 2002:a5d:434c:: with SMTP id u12mr3249272wrr.14.1550155982486; Thu, 14 Feb 2019 06:53:02 -0800 (PST) Received: from debian-brgl.home ([2a01:cb1d:af:5b00:6d6c:8493:1ab5:dad7]) by smtp.gmail.com with ESMTPSA id y20sm4181005wra.51.2019.02.14.06.53.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Feb 2019 06:53:01 -0800 (PST) From: Bartosz Golaszewski To: Dmitry Torokhov , Sekhar Nori , Kevin Hilman , Thomas Gleixner , Jason Cooper , Marc Zyngier , David Lechner Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v4 16/37] ARM: davinci: aintc: use the new irqchip config structure in dm* SoCs Date: Thu, 14 Feb 2019 15:52:10 +0100 Message-Id: <20190214145231.8750-17-brgl@bgdev.pl> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190214145231.8750-1-brgl@bgdev.pl> References: <20190214145231.8750-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bartosz Golaszewski Add the new-style config structures for dm* SoCs. They will be used once we make the aintc driver stop using davinci_soc_info. Signed-off-by: Bartosz Golaszewski --- arch/arm/mach-davinci/dm355.c | 11 +++++++++++ arch/arm/mach-davinci/dm365.c | 11 +++++++++++ arch/arm/mach-davinci/dm644x.c | 11 +++++++++++ arch/arm/mach-davinci/dm646x.c | 11 +++++++++++ 4 files changed, 44 insertions(+) diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index e2b680e9944b..ff79c1a17fae 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -792,6 +793,16 @@ int __init dm355_init_video(struct vpfe_config *vpfe_cfg, return 0; } +static const struct davinci_aintc_config dm355_aintc_config = { + .reg = { + .start = DAVINCI_ARM_INTC_BASE, + .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .num_irqs = 64, + .prios = dm355_default_priorities, +}; + void __init dm355_init_irq(void) { davinci_aintc_init(); diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 76507dcbcb3a..44dc3ca94dd3 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -1051,6 +1052,16 @@ int __init dm365_init_video(struct vpfe_config *vpfe_cfg, return 0; } +static const struct davinci_aintc_config dm365_aintc_config = { + .reg = { + .start = DAVINCI_ARM_INTC_BASE, + .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .num_irqs = 64, + .prios = dm365_default_priorities, +}; + void __init dm365_init_irq(void) { davinci_aintc_init(); diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 27c73bc54069..0b0ecac36486 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -728,6 +729,16 @@ int __init dm644x_init_video(struct vpfe_config *vpfe_cfg, return 0; } +static const struct davinci_aintc_config dm644x_aintc_config = { + .reg = { + .start = DAVINCI_ARM_INTC_BASE, + .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .num_irqs = 64, + .prios = dm644x_default_priorities, +}; + void __init dm644x_init_irq(void) { davinci_aintc_init(); diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 98fc5e3815b9..4e871d00e4e9 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -689,6 +690,16 @@ void __init dm646x_register_clocks(void) platform_device_register(&dm646x_pll2_device); } +static const struct davinci_aintc_config dm646x_aintc_config = { + .reg = { + .start = DAVINCI_ARM_INTC_BASE, + .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .num_irqs = 64, + .prios = dm646x_default_priorities, +}; + void __init dm646x_init_irq(void) { davinci_aintc_init(); -- 2.20.1