From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D24FDC10F04 for ; Fri, 15 Feb 2019 02:33:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A3E6E20840 for ; Fri, 15 Feb 2019 02:33:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1550198034; bh=ZvcuN1XWV49X7kbMeKYFklVK5XcY2TZ/Aqo0prOc6Yw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=ve26VyoX/Hpnp5endmdUyCHTVIweseyryDV6zUq8JiRxvuKg+vWI49+fbPjbrxERU hA3HMpw05faJK0JXSLN6NWEKXYdguL+jYaZIE0Nu8H1vH8zMav8RLZ+2kuPq1FxEa2 LlsbuoveOCj0GT+Ecbb5b+nfn6F2AsMhxR0ts+/I= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390846AbfBOCLw (ORCPT ); Thu, 14 Feb 2019 21:11:52 -0500 Received: from mail.kernel.org ([198.145.29.99]:51820 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2404028AbfBOCLs (ORCPT ); Thu, 14 Feb 2019 21:11:48 -0500 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8A93121B68; Fri, 15 Feb 2019 02:11:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1550196707; bh=ZvcuN1XWV49X7kbMeKYFklVK5XcY2TZ/Aqo0prOc6Yw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=zMr+vpOfNPM7CI4/hsbySojMHctos14YBxl+s8WJ1XkzZhpL6yGcO7rPoShUeHRO6 P9luCpmk2lswwa+68VjHsv1HlaTjne00itN2roR0oA1SOsP7iEBxCoehoSPVQ5fD3R vQF95WmGMpi4S2SjkeM5pLRr2Q+tnycFRmVJfR2s= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Shuming Fan , Mark Brown , Sasha Levin Subject: [PATCH AUTOSEL 4.19 16/65] ASoC: rt5682: Fix PLL source register definitions Date: Thu, 14 Feb 2019 21:10:32 -0500 Message-Id: <20190215021121.177674-16-sashal@kernel.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190215021121.177674-1-sashal@kernel.org> References: <20190215021121.177674-1-sashal@kernel.org> MIME-Version: 1.0 X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Shuming Fan [ Upstream commit ee7ea2a9a318a89d21b156dc75e54d53904bdbe5 ] Fix typo which causes headphone no sound while using BCLK as PLL source. Signed-off-by: Shuming Fan Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- sound/soc/codecs/rt5682.h | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/rt5682.h b/sound/soc/codecs/rt5682.h index 8068140ebe3f..cdd659f4df93 100644 --- a/sound/soc/codecs/rt5682.h +++ b/sound/soc/codecs/rt5682.h @@ -849,18 +849,18 @@ #define RT5682_SCLK_SRC_PLL2 (0x2 << 13) #define RT5682_SCLK_SRC_SDW (0x3 << 13) #define RT5682_SCLK_SRC_RCCLK (0x4 << 13) -#define RT5682_PLL1_SRC_MASK (0x3 << 10) -#define RT5682_PLL1_SRC_SFT 10 -#define RT5682_PLL1_SRC_MCLK (0x0 << 10) -#define RT5682_PLL1_SRC_BCLK1 (0x1 << 10) -#define RT5682_PLL1_SRC_SDW (0x2 << 10) -#define RT5682_PLL1_SRC_RC (0x3 << 10) -#define RT5682_PLL2_SRC_MASK (0x3 << 8) -#define RT5682_PLL2_SRC_SFT 8 -#define RT5682_PLL2_SRC_MCLK (0x0 << 8) -#define RT5682_PLL2_SRC_BCLK1 (0x1 << 8) -#define RT5682_PLL2_SRC_SDW (0x2 << 8) -#define RT5682_PLL2_SRC_RC (0x3 << 8) +#define RT5682_PLL2_SRC_MASK (0x3 << 10) +#define RT5682_PLL2_SRC_SFT 10 +#define RT5682_PLL2_SRC_MCLK (0x0 << 10) +#define RT5682_PLL2_SRC_BCLK1 (0x1 << 10) +#define RT5682_PLL2_SRC_SDW (0x2 << 10) +#define RT5682_PLL2_SRC_RC (0x3 << 10) +#define RT5682_PLL1_SRC_MASK (0x3 << 8) +#define RT5682_PLL1_SRC_SFT 8 +#define RT5682_PLL1_SRC_MCLK (0x0 << 8) +#define RT5682_PLL1_SRC_BCLK1 (0x1 << 8) +#define RT5682_PLL1_SRC_SDW (0x2 << 8) +#define RT5682_PLL1_SRC_RC (0x3 << 8) -- 2.19.1