From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B93BCC43381 for ; Fri, 15 Feb 2019 16:16:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8057B21924 for ; Fri, 15 Feb 2019 16:16:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727549AbfBOQQe (ORCPT ); Fri, 15 Feb 2019 11:16:34 -0500 Received: from muru.com ([72.249.23.125]:39028 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726000AbfBOQQe (ORCPT ); Fri, 15 Feb 2019 11:16:34 -0500 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id E1EF580C0; Fri, 15 Feb 2019 16:16:42 +0000 (UTC) Date: Fri, 15 Feb 2019 08:16:29 -0800 From: Tony Lindgren To: Lokesh Vutla Cc: marc.zyngier@arm.com, Nishanth Menon , Santosh Shilimkar , Rob Herring , tglx@linutronix.de, jason@lakedaemon.net, Linux ARM Mailing List , linux-kernel@vger.kernel.org, Device Tree Mailing List , Sekhar Nori , Tero Kristo , Peter Ujfalusi Subject: Re: [PATCH v5 05/10] dt-bindings: irqchip: Introduce TISCI Interrupt router bindings Message-ID: <20190215161629.GK5720@atomide.com> References: <20190212074237.2875-1-lokeshvutla@ti.com> <20190212074237.2875-6-lokeshvutla@ti.com> <20190212162247.GK5720@atomide.com> <6a274588-0fb6-2ddf-3bcc-f9e4d849ac07@ti.com> <20190213152620.GS5720@atomide.com> <4791de04-63af-4c5e-db9c-47634fcb8dc9@ti.com> <20190214154100.GB5720@atomide.com> <20190214174612.GF5720@atomide.com> <171e8597-2156-747d-d024-7b4bfc6f9186@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <171e8597-2156-747d-d024-7b4bfc6f9186@ti.com> User-Agent: Mutt/1.11.2 (2019-01-07) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, * Lokesh Vutla [190214 18:03]: > On 2/14/2019 11:16 PM, Tony Lindgren wrote: > > But I'd rather have a proper hardware based phandle + index > > type mapping in the dts if possible though. > > The idea about sysfw here is that Linux is not aware of anything about > this device(Interrupt Router). It cannot even access any of its > registers. As a user Linux should know who is the parent to which the > Interrut router output should be configured. Then query sysfw about the > range of gic irqs allocated to it. Now for configuration, Linux should > pass the the input to interrupt router, gic irq no, and gic id(by which > sysfw uniquely identifies GIC interrupt controller with the SoC). Based > on these parameters Interrupt Router registers gets configured. If the interrupt router hardawre is hidden away from Linux, just leave it out of the device tree completely and have the interrupt controller driver request the routing. The dts node for the interrupt controller should describe a proper Linux device, that is with reg entries and so on. Regards, Tony