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From: Peter Zijlstra <peterz@infradead.org>
To: kan.liang@linux.intel.com
Cc: acme@kernel.org, mingo@redhat.com, linux-kernel@vger.kernel.org,
	tglx@linutronix.de, jolsa@kernel.org, eranian@google.com,
	alexander.shishkin@linux.intel.com, ak@linux.intel.com
Subject: Re: [PATCH 02/22] perf/x86/intel: Extract memory code PEBS parser for reuse
Date: Tue, 19 Mar 2019 14:14:53 +0100	[thread overview]
Message-ID: <20190319131453.GG5996@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20190318214144.4639-3-kan.liang@linux.intel.com>

On Mon, Mar 18, 2019 at 02:41:24PM -0700, kan.liang@linux.intel.com wrote:
> @@ -1125,34 +1125,50 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
>  	return 0;
>  }
>  
> -static inline u64 intel_hsw_weight(struct pebs_record_skl *pebs)
> +static inline u64 intel_hsw_weight(u64 tsx_tuning)

That function name is now completely insane. It used to be a reference
to the hsw pebs format, but you just destroyed that.

>  {
> -	if (pebs->tsx_tuning) {
> -		union hsw_tsx_tuning tsx = { .value = pebs->tsx_tuning };
> +	if (tsx_tuning) {
> +		union hsw_tsx_tuning tsx = { .value = tsx_tuning };
>  		return tsx.cycles_last_block;
>  	}
>  	return 0;
>  }
>  
> -static inline u64 intel_hsw_transaction(struct pebs_record_skl *pebs)
> +static u64 intel_hsw_transaction(u64 tsx_tuning, u64 ax)

Guess what...

>  {
> -	u64 txn = (pebs->tsx_tuning & PEBS_HSW_TSX_FLAGS) >> 32;
> +	u64 txn = (tsx_tuning & PEBS_HSW_TSX_FLAGS) >> 32;
>  
>  	/* For RTM XABORTs also log the abort code from AX */
> -	if ((txn & PERF_TXN_TRANSACTION) && (pebs->ax & 1))
> -		txn |= ((pebs->ax >> 24) & 0xff) << PERF_TXN_ABORT_SHIFT;
> +	if ((txn & PERF_TXN_TRANSACTION) && (ax & 1))
> +		txn |= ((ax >> 24) & 0xff) << PERF_TXN_ABORT_SHIFT;
>  	return txn;
>  }

  reply	other threads:[~2019-03-19 13:15 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-18 21:41 [PATCH 00/22] perf: Add Icelake support kan.liang
2019-03-18 21:41 ` [PATCH 01/22] perf/core: Support outputting registers from a separate array kan.liang
2019-03-19 13:00   ` Peter Zijlstra
2019-03-19 14:13     ` Peter Zijlstra
2019-03-18 21:41 ` [PATCH 02/22] perf/x86/intel: Extract memory code PEBS parser for reuse kan.liang
2019-03-19 13:14   ` Peter Zijlstra [this message]
2019-03-18 21:41 ` [PATCH 03/22] perf/x86/intel: Support adaptive PEBSv4 kan.liang
2019-03-19 14:47   ` Peter Zijlstra
2019-03-19 16:03     ` Andi Kleen
2019-03-19 16:11       ` Peter Zijlstra
2019-03-19 21:20     ` Liang, Kan
2019-03-19 21:38     ` Andi Kleen
2019-03-20 15:58       ` Peter Zijlstra
2019-03-18 21:41 ` [PATCH 04/22] perf/x86/lbr: Avoid reading the LBRs when adaptive PEBS handles them kan.liang
2019-03-18 21:41 ` [PATCH 05/22] perf/x86: Support constraint ranges kan.liang
2019-03-19 14:53   ` Peter Zijlstra
2019-03-19 15:27     ` Peter Zijlstra
2019-03-19 15:57     ` Andi Kleen
2019-03-19 16:09       ` Peter Zijlstra
2019-03-18 21:41 ` [PATCH 06/22] perf/x86/intel: Add Icelake support kan.liang
2019-03-20  0:08   ` Stephane Eranian
2019-03-20 14:20     ` Liang, Kan
2019-03-18 21:41 ` [PATCH 07/22] perf/x86/intel/cstate: " kan.liang
2019-03-18 21:41 ` [PATCH 08/22] perf/x86/intel/rapl: " kan.liang
2019-03-18 21:41 ` [PATCH 09/22] perf/x86/msr: " kan.liang
2019-03-18 21:41 ` [PATCH 10/22] perf/x86/intel/uncore: Add Intel Icelake uncore support kan.liang
2019-03-18 21:41 ` [PATCH 11/22] perf/core: Support a REMOVE transaction kan.liang
2019-03-19 15:29   ` Peter Zijlstra
2019-03-18 21:41 ` [PATCH 12/22] perf/x86/intel: Basic support for metrics counters kan.liang
2019-03-18 21:41 ` [PATCH 13/22] perf/x86/intel: Support overflows on SLOTS kan.liang
2019-03-18 21:41 ` [PATCH 14/22] perf/x86/intel: Support hardware TopDown metrics kan.liang
2019-03-18 21:41 ` [PATCH 15/22] perf/x86/intel: Set correct weight for topdown subevent counters kan.liang
2019-03-18 21:41 ` [PATCH 16/22] perf/x86/intel: Export new top down events for Icelake kan.liang
2019-03-18 21:41 ` [PATCH 17/22] perf/x86/intel: Disable sampling read slots and topdown kan.liang
2019-03-18 21:41 ` [PATCH 18/22] perf/x86/intel: Support CPUID 10.ECX to disable fixed counters kan.liang
2019-03-18 21:41 ` [PATCH 19/22] perf, tools: Add support for recording and printing XMM registers kan.liang
2019-03-18 21:41 ` [PATCH 20/22] perf, tools, stat: Support new per thread TopDown metrics kan.liang
2019-03-18 21:41 ` [PATCH 21/22] perf, tools: Add documentation for topdown metrics kan.liang
2019-03-18 21:41 ` [PATCH 22/22] perf vendor events intel: Add JSON files for Icelake kan.liang

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