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From: Andi Kleen <ak@linux.intel.com>
To: kan.liang@linux.intel.com
Cc: peterz@infradead.org, acme@kernel.org, mingo@redhat.com,
	linux-kernel@vger.kernel.org, tglx@linutronix.de,
	jolsa@kernel.org, eranian@google.com,
	alexander.shishkin@linux.intel.com
Subject: Re: [PATCH V4 04/23] perf/x86/intel: Support adaptive PEBSv4
Date: Tue, 26 Mar 2019 15:24:41 -0700	[thread overview]
Message-ID: <20190326222441.GP18020@tassilo.jf.intel.com> (raw)
In-Reply-To: <20190326160901.4887-5-kan.liang@linux.intel.com>

> +	for (at = base; at < top; at += cpuc->pebs_record_size) {
> +		u64 pebs_status;
> +
> +		pebs_status = get_pebs_status(at) & cpuc->pebs_enabled;
> +		pebs_status &= mask;
> +
> +		for_each_set_bit(bit, (unsigned long *)&pebs_status, size)
> +			counts[bit]++;
> +	}

On Icelake pebs_status is always reliable, so I don't think we need
the two pass walking.

-Andi

> +
> +	for (bit = 0; bit < size; bit++) {
> +		if (counts[bit] == 0)
> +			continue;
> +
> +		event = cpuc->events[bit];
> +		if (WARN_ON_ONCE(!event))
> +			continue;
> +
> +		if (WARN_ON_ONCE(!event->attr.precise_ip))
> +			continue;
> +
> +		__intel_pmu_pebs_event(event, iregs, base,
> +				       top, bit, counts[bit],
> +				       setup_pebs_adaptive_sample_data);
> +	}
> +}

  reply	other threads:[~2019-03-26 22:24 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-26 16:08 [PATCH V4 00/23] perf: Add Icelake support kan.liang
2019-03-26 16:08 ` [PATCH V4 01/23] perf/x86: Support outputting XMM registers kan.liang
2019-04-01 19:18   ` Stephane Eranian
2019-04-01 19:54     ` Liang, Kan
2019-04-01 21:11       ` Stephane Eranian
2019-04-01 22:33         ` Liang, Kan
2019-03-26 16:08 ` [PATCH V4 02/23] perf/x86/intel: Extract memory code PEBS parser for reuse kan.liang
2019-03-26 16:08 ` [PATCH V4 03/23] perf/x86/intel/ds: Extract code of event update in short period kan.liang
2019-03-26 16:08 ` [PATCH V4 04/23] perf/x86/intel: Support adaptive PEBSv4 kan.liang
2019-03-26 22:24   ` Andi Kleen [this message]
2019-03-27 14:25     ` Liang, Kan
2019-03-27 14:42       ` Andi Kleen
2019-03-26 16:08 ` [PATCH V4 05/23] perf/x86/lbr: Avoid reading the LBRs when adaptive PEBS handles them kan.liang
2019-03-26 16:08 ` [PATCH V4 06/23] perf/x86: Support constraint ranges kan.liang
2019-03-26 16:08 ` [PATCH V4 07/23] perf/x86/intel: Add Icelake support kan.liang
2019-03-26 16:08 ` [PATCH V4 08/23] perf/x86/intel/cstate: " kan.liang
2019-03-26 16:08 ` [PATCH V4 09/23] perf/x86/intel/rapl: " kan.liang
2019-03-26 16:08 ` [PATCH V4 10/23] perf/x86/msr: " kan.liang
2019-03-26 16:08 ` [PATCH V4 11/23] perf/x86/intel/uncore: Add Intel Icelake uncore support kan.liang
2019-03-26 16:08 ` [PATCH V4 12/23] perf/core: Support a REMOVE transaction kan.liang
2019-03-26 16:08 ` [PATCH V4 13/23] perf/x86/intel: Basic support for metrics counters kan.liang
2019-03-26 16:08 ` [PATCH V4 14/23] perf/x86/intel: Support overflows on SLOTS kan.liang
2019-03-26 16:08 ` [PATCH V4 15/23] perf/x86/intel: Support hardware TopDown metrics kan.liang
2019-03-26 16:08 ` [PATCH V4 16/23] perf/x86/intel: Set correct weight for topdown subevent counters kan.liang
2019-03-26 16:08 ` [PATCH V4 17/23] perf/x86/intel: Export new top down events for Icelake kan.liang
2019-03-26 16:08 ` [PATCH V4 18/23] perf/x86/intel: Disable sampling read slots and topdown kan.liang
2019-03-26 16:08 ` [PATCH V4 19/23] perf/x86/intel: Support CPUID 10.ECX to disable fixed counters kan.liang
2019-03-26 16:08 ` [PATCH V4 20/23] perf, tools: Add support for recording and printing XMM registers kan.liang
2019-03-26 16:08 ` [PATCH V4 21/23] perf, tools, stat: Support new per thread TopDown metrics kan.liang
2019-03-26 16:09 ` [PATCH V4 22/23] perf, tools: Add documentation for topdown metrics kan.liang
2019-03-26 16:09 ` [PATCH V4 23/23] perf vendor events intel: Add JSON files for Icelake kan.liang
2019-04-01 13:01 ` [PATCH V4 00/23] perf: Add Icelake support Liang, Kan

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