From: Wolfram Sang <wsa@the-dreams.de>
To: Nguyen An Hoan <na-hoan@jinso.co.jp>
Cc: linux-renesas-soc@vger.kernel.org, geert+renesas@glider.be,
rui.zhang@intel.com, jslaby@suse.com,
wsa+renesas@sang-engineering.com, edubezval@gmail.com,
linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
kuninori.morimoto.gx@renesas.com,
yoshihiro.shimoda.uh@renesas.com, h-inayoshi@jinso.co.jp,
nv-dung@jinso.co.jp, cv-dong@jinso.co.jp
Subject: Re: [RESEND PATCH] thermal: rcar_gen3_thermal: Fix init value of IRQCTL register
Date: Thu, 28 Mar 2019 08:06:33 +0100 [thread overview]
Message-ID: <20190328070633.GA902@kunai> (raw)
In-Reply-To: <1553677398-7896-1-git-send-email-na-hoan@jinso.co.jp>
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On Wed, Mar 27, 2019 at 06:03:18PM +0900, Nguyen An Hoan wrote:
> From: Hoan Nguyen An <na-hoan@jinso.co.jp>
>
> Fix setting value for IRQCTL register. We are setting the last 6 bits
> of (IRQCTL) to be 1 (0x3f), this is only suitable for H3ES1.*, according
> to Hardware manual values 1 are "setting prohibited" for Gen3.
>
> Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
Yes, this is what we discussed for "[v2 PATCH] thermal:
rcar_gen3_thermal: Fix init value of IRQCTL register"
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
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next prev parent reply other threads:[~2019-03-28 7:06 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-27 9:03 [RESEND PATCH] thermal: rcar_gen3_thermal: Fix init value of IRQCTL register Nguyen An Hoan
2019-03-27 9:31 ` Niklas Söderlund
2019-03-27 9:34 ` Yoshihiro Shimoda
2019-03-28 7:06 ` Wolfram Sang [this message]
2019-03-28 8:05 ` Geert Uytterhoeven
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