Re: [PATCH V9 5/5] drm/mediatek: no change parent rate in round_rate() for mt2701 hdmi phy

CK Hu
2019-04-09T05:41:46Z

Hi, Wangyan:

On Tue, 2019-04-09 at 11:07 +0800, wangyan wang wrote:
> From: Wangyan Wang <wangyan.wang@mediatek.com>
>
> This is the third step to make MT2701 HDMI stable.
> We should not change the rate of parent for hdmi phy when
> doing round_rate for this clock. The parent clock of hdmi
> phy must be the same as it. We change it when doing set_rate
> only.
>
> Signed-off-by: Wangyan Wang <wangyan.wang@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 14 --------------
> drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 2 --
> drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 6 ++++++
> drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 14 ++++++++++++++
> 4 files changed, 20 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
> index 9e153e080739..e3a6b50e0cf2 100644
> --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
> +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
> @@ -15,20 +15,6 @@ static const struct phy_ops mtk_hdmi_phy_dev_ops = {
> .owner = THIS_MODULE,
> };
>
> -long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
> - unsigned long *parent_rate)
> -{
> - struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
> -
> - hdmi_phy->pll_rate = rate;
> - if (rate <= 74250000)
> - *parent_rate = rate;
> - else
> - *parent_rate = rate / 2;
> -
> - return rate;
> -}
> -
> void mtk_hdmi_phy_clear_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
> u32 bits)
> {
> diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
> index d28b8d5ed2b4..2d8b3182470d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
> +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
> @@ -49,8 +49,6 @@ void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
> void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
> u32 val, u32 mask);
> struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw);
> -long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
> - unsigned long *parent_rate);
>
> extern struct platform_driver mtk_hdmi_phy_driver;
> extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf;
> diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> index b24ea6651db4..e3f05ad89b1e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> @@ -106,6 +106,12 @@ static void mtk_hdmi_pll_unprepare(struct clk_hw *hw)
> usleep_range(80, 100);
> }
>
> +static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
> + unsigned long *parent_rate)

I think you've tried to align, but the result looks not aligned. Make
sure your editor have equal size for each character and the 'tab' length
is 8 character.

Regards,
CK

> +
> +{
> + return rate;
> +}
> +
> static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
> unsigned long parent_rate)
> {
> diff --git a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
> index 625739b4e938..78c638c29102 100644
> --- a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
> +++ b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
> @@ -199,6 +199,20 @@ static void mtk_hdmi_pll_unprepare(struct clk_hw *hw)
> usleep_range(100, 150);
> }
>
> +long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
> + unsigned long *parent_rate)
> +
> +{
> + struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
> +
> + hdmi_phy->pll_rate = rate;
> + if (rate <= 74250000)
> + *parent_rate = rate;
> + else
> + *parent_rate = rate / 2;
> +
> + return rate;
> +}
> +
> static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
> unsigned long parent_rate)
> {