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From: Peter Zijlstra <peterz@infradead.org>
To: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@kernel.org>, Borislav Petkov <bp@alien8.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>,
	linux-kernel@vger.kernel.org, Andy Lutomirski <luto@kernel.org>,
	Nadav Amit <namit@vmware.com>,
	Dave Hansen <dave.hansen@intel.com>
Subject: [PATCH] x86/tlb: Revert: Align TLB invalidation info
Date: Tue, 16 Apr 2019 10:03:35 +0200	[thread overview]
Message-ID: <20190416080335.GM7905@worktop.programming.kicks-ass.net> (raw)


It was found that under some .config options (notably L1_CACHE_SHIFT=7)
and compiler combinations this on-stack alignment leads to a 320 byte
stack usage, which then triggers a KASAN stack warning elsewhere.

Using 320 bytes of stack space for a 40 byte structure is ludicrous and
clearly not right.

Fixes: 515ab7c41306 ("x86/mm: Align TLB invalidation info")
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
Index: linux-2.6/arch/x86/mm/tlb.c
===================================================================
--- linux-2.6.orig/arch/x86/mm/tlb.c
+++ linux-2.6/arch/x86/mm/tlb.c
@@ -728,7 +728,7 @@ void flush_tlb_mm_range(struct mm_struct
 {
 	int cpu;
 
-	struct flush_tlb_info info __aligned(SMP_CACHE_BYTES) = {
+	struct flush_tlb_info info = {
 		.mm = mm,
 		.stride_shift = stride_shift,
 		.freed_tables = freed_tables,

             reply	other threads:[~2019-04-16  8:03 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-16  8:03 Peter Zijlstra [this message]
2019-04-16  8:13 ` [tip:x86/urgent] x86/mm/tlb: Revert "x86/mm: Align TLB invalidation info" tip-bot for Peter Zijlstra
2019-04-16 17:45 ` [PATCH] x86/tlb: Revert: Align TLB invalidation info Linus Torvalds
2019-04-16 18:28   ` Peter Zijlstra
2019-04-17  4:52     ` Nadav Amit

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