[PATCH 3/3] phy: tegra: xusb: Add Tegra210 PLL power supplies

Thierry Reding
2019-04-25T15:35:02Z

The Tegra210 SoC has four inputs that consume power in order to supply
the PLLs that drive the various USB, PCI and SATA pads.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
drivers/phy/tegra/xusb-tegra210.c | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/drivers/phy/tegra/xusb-tegra210.c b/drivers/phy/tegra/xusb-tegra210.c
index 05bee32a3a4d..eb754baa8d71 100644
--- a/drivers/phy/tegra/xusb-tegra210.c
+++ b/drivers/phy/tegra/xusb-tegra210.c
@@ -2017,6 +2017,13 @@ static const struct tegra_xusb_padctl_ops tegra210_xusb_padctl_ops = {
.hsic_set_idle = tegra210_hsic_set_idle,
};

+static const char * const tegra210_xusb_padctl_supply_names[] = {
+ "avdd-pll-utmip",
+ "avdd-pll-uerefe",
+ "dvdd-pex-pll",
+ "hvdd-pex-pll-e",
+};
+
const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc = {
.num_pads = ARRAY_SIZE(tegra210_pads),
.pads = tegra210_pads,
@@ -2035,6 +2042,8 @@ const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc = {
},
},
.ops = &tegra210_xusb_padctl_ops,
+ .supply_names = tegra210_xusb_padctl_supply_names,
+ .num_supplies = ARRAY_SIZE(tegra210_xusb_padctl_supply_names),
};
EXPORT_SYMBOL_GPL(tegra210_xusb_padctl_soc);

--
2.21.0