From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 268B5C04AB6 for ; Tue, 28 May 2019 12:15:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EFD76208CB for ; Tue, 28 May 2019 12:15:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="WM/F/57G" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727028AbfE1MPV (ORCPT ); Tue, 28 May 2019 08:15:21 -0400 Received: from merlin.infradead.org ([205.233.59.134]:49258 "EHLO merlin.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726620AbfE1MPU (ORCPT ); Tue, 28 May 2019 08:15:20 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=+HvcFPeFbKd6HnzjD8fUyll8hXzECqj7VfG2vR2xVrM=; b=WM/F/57Ga/kXxbein/MdI6yKX 6A2t7eakLbMnDLAKI1avJ5CmPRNwX7xe/rBimACOMDcAZrEDnyRXhs51RkZIkiK8pvEhPFWDIihZ+ /xgyy8siB1ve0pBEnYlvkCddxcuIZ2LiUb29hViRj4FY8LdVHUUb8r5vkvwiP/dBTI3qD8cTerRuk JExTQNw1i7a+g4W0k8QDlzjZNOsIARTphjAjagN9GoFtmONy5IGrRiPQaZ8NmZ5Q7e1RSTIttGAqA 8H15e0ayQAThAu2RiS3wdEoGhag617o3G7zIG3p5joMlW3IY4uo/eM1HFTybmEhu53u+N2gmRNHov QoslpJ87g==; Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=hirez.programming.kicks-ass.net) by merlin.infradead.org with esmtpsa (Exim 4.90_1 #2 (Red Hat Linux)) id 1hVb0e-0003IW-1J; Tue, 28 May 2019 12:15:16 +0000 Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 7128D2074C650; Tue, 28 May 2019 14:15:08 +0200 (CEST) Date: Tue, 28 May 2019 14:15:08 +0200 From: Peter Zijlstra To: kan.liang@linux.intel.com Cc: acme@kernel.org, mingo@redhat.com, linux-kernel@vger.kernel.org, tglx@linutronix.de, jolsa@kernel.org, eranian@google.com, alexander.shishkin@linux.intel.com, ak@linux.intel.com Subject: Re: [PATCH 2/9] perf/x86/intel: Basic support for metrics counters Message-ID: <20190528121508.GS2606@hirez.programming.kicks-ass.net> References: <20190521214055.31060-1-kan.liang@linux.intel.com> <20190521214055.31060-3-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190521214055.31060-3-kan.liang@linux.intel.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 21, 2019 at 02:40:48PM -0700, kan.liang@linux.intel.com wrote: > +/* > + * We model PERF_METRICS as more magic fixed-mode PMCs, one for each metric > + * and another for the whole slots counter > + * > + * Internally they all map to Fixed Ctr 3 (SLOTS), and allocate PERF_METRICS > + * as an extra_reg. PERF_METRICS has no own configuration, but we fill in > + * the configuration of FxCtr3 to enforce that all the shared users of SLOTS > + * have the same configuration. > + */ > +#define INTEL_PMC_IDX_FIXED_METRIC_BASE (INTEL_PMC_IDX_FIXED + 17) > +#define INTEL_PMC_IDX_TD_RETIRING (INTEL_PMC_IDX_FIXED_METRIC_BASE + 0) > +#define INTEL_PMC_IDX_TD_BAD_SPEC (INTEL_PMC_IDX_FIXED_METRIC_BASE + 1) > +#define INTEL_PMC_IDX_TD_FE_BOUND (INTEL_PMC_IDX_FIXED_METRIC_BASE + 2) > +#define INTEL_PMC_IDX_TD_BE_BOUND (INTEL_PMC_IDX_FIXED_METRIC_BASE + 3) > +#define INTEL_PMC_MSK_ANY_SLOTS ((0xfull << INTEL_PMC_IDX_FIXED_METRIC_BASE) | \ > + INTEL_PMC_MSK_FIXED_SLOTS) > +static inline bool is_metric_idx(int idx) > +{ > + return idx >= INTEL_PMC_IDX_FIXED_METRIC_BASE && idx <= INTEL_PMC_IDX_TD_BE_BOUND; > +} Something like: return (idx >> INTEL_PMC_IDX_FIXED_METRIC_BASE) & 0xf; might be faster code... (if it wasn't for 64bit literals being a pain, it could be a simple test instruction).