From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,T_DKIMWL_WL_HIGH,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2E8AC28CC3 for ; Sat, 1 Jun 2019 13:27:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B2F4325DA0 for ; Sat, 1 Jun 2019 13:27:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1559395676; bh=xo/HVDXnZUTw1egaog1W5dRMlGcmSy5gcJmhj/9oWRE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=uRSyf20gd2uZnRAzKmqewFzURvTK91czLbMmYoFKA1980wYI1MYNsrVdIZgTMRyx8 NwXhPceBmdj0M95NtLvn22Ruh+laNDUs1m22sp5HFMJUQ3xrS2JoZSlsVuwHPniDpI hJBLBKMj5cdHuGnofsWK3jkKL0uPrUiEONaAU1ts= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730021AbfFAN14 (ORCPT ); Sat, 1 Jun 2019 09:27:56 -0400 Received: from mail.kernel.org ([198.145.29.99]:60184 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729960AbfFAN1f (ORCPT ); Sat, 1 Jun 2019 09:27:35 -0400 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B658326FAA; Sat, 1 Jun 2019 13:27:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1559395654; bh=xo/HVDXnZUTw1egaog1W5dRMlGcmSy5gcJmhj/9oWRE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=xeeMtw9WhYjv/dM0kkq1cLrvvVJ43sw3QCNpfmgNj8tNIM+i7GDbtTOzkE2TuoZ5s a5d93nsTPT0kCjFYL06IhhAqeMnisGGCU+9JKXq1/DA7pdYPSK/Oo2tr9T1mQdyQM3 sSnP6gw9ZjvWl9TkrJ8pmVRAsoG0d1cOvyW3mCK4= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: =?UTF-8?q?Christoph=20Vogtl=C3=A4nder?= , Vignesh Raghavendra , Thierry Reding , Sasha Levin , linux-pwm@vger.kernel.org Subject: [PATCH AUTOSEL 4.4 53/56] pwm: tiehrpwm: Update shadow register for disabling PWMs Date: Sat, 1 Jun 2019 09:25:57 -0400 Message-Id: <20190601132600.27427-53-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190601132600.27427-1-sashal@kernel.org> References: <20190601132600.27427-1-sashal@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Christoph Vogtländer [ Upstream commit b00ef53053191d3025c15e8041699f8c9d132daf ] It must be made sure that immediate mode is not already set, when modifying shadow register value in ehrpwm_pwm_disable(). Otherwise modifications to the action-qualifier continuous S/W force register(AQSFRC) will be done in the active register. This may happen when both channels are being disabled. In this case, only the first channel state will be recorded as disabled in the shadow register. Later, when enabling the first channel again, the second channel would be enabled as well. Setting RLDCSF to zero, first, ensures that the shadow register is updated as desired. Fixes: 38dabd91ff0b ("pwm: tiehrpwm: Fix disabling of output of PWMs") Signed-off-by: Christoph Vogtländer [vigneshr@ti.com: Improve commit message] Signed-off-by: Vignesh Raghavendra Signed-off-by: Thierry Reding Signed-off-by: Sasha Levin --- drivers/pwm/pwm-tiehrpwm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pwm/pwm-tiehrpwm.c b/drivers/pwm/pwm-tiehrpwm.c index 062dff1c902df..ede17f89d57f6 100644 --- a/drivers/pwm/pwm-tiehrpwm.c +++ b/drivers/pwm/pwm-tiehrpwm.c @@ -385,6 +385,8 @@ static void ehrpwm_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) } /* Update shadow register first before modifying active register */ + ehrpwm_modify(pc->mmio_base, AQSFRC, AQSFRC_RLDCSF_MASK, + AQSFRC_RLDCSF_ZRO); ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val); /* * Changes to immediate action on Action Qualifier. This puts -- 2.20.1