From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, T_DKIMWL_WL_HIGH autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79F6FC31E41 for ; Mon, 10 Jun 2019 14:51:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4F0E4206C3 for ; Mon, 10 Jun 2019 14:51:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1560178295; bh=/U+wRbtteOILfQyqQEFAX34EWpIssdlfePMqvbBQcok=; h=In-Reply-To:References:To:From:Cc:Subject:Date:List-ID:From; b=FOvHDGZ8EjU7GNV7Z9zfVcG6YH8ETpCBapF7ArupI8duRs9BOGby1g0TXtQG3xAQw BCesAkbORtfMJuP7KHhlp9yWC9n08E8/PMdyHXBtcG7TpcZYWe+Uo4vnH0Lac95tLa fVOdOw2L9GFw8KI8p4DiUuIbd2WvtAvtVCqWR9sw= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390982AbfFJOve (ORCPT ); Mon, 10 Jun 2019 10:51:34 -0400 Received: from mail.kernel.org ([198.145.29.99]:49490 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389123AbfFJOvd (ORCPT ); Mon, 10 Jun 2019 10:51:33 -0400 Received: from kernel.org (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DD1132085A; Mon, 10 Jun 2019 14:51:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1560178293; bh=/U+wRbtteOILfQyqQEFAX34EWpIssdlfePMqvbBQcok=; h=In-Reply-To:References:To:From:Cc:Subject:Date:From; b=Ni0M5RTJQlOeKFtGcIhyjvjbFQh9+sc5iJLSUSog2oF2FOHTnobpDTXHykwpzxgoP TZDXbEjB6h0jAElBvVK5dtBxqTyu8J34WTjIwPSqdNbb/z4yUNw2TDvhq+BsP3AHAK dF5aylUD2a3MN7MyeBl1zrHT8NaBG5H7Zs8xVfko= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: References: <1559285512-27784-1-git-send-email-tengfeif@codeaurora.org> To: Bjorn Andersson , Linus Walleij , Niklas Cassel , Tengfei Fan From: Stephen Boyd Cc: Andy Gross , David Brown , MSM , "open list:GPIO SUBSYSTEM" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH] pinctrl: qcom: Clear status bit on irq_unmask User-Agent: alot/0.8.1 Date: Mon, 10 Jun 2019 07:51:32 -0700 Message-Id: <20190610145132.DD1132085A@mail.kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Linus Walleij (2019-06-07 14:08:10) > On Fri, May 31, 2019 at 8:52 AM Tengfei Fan wro= te: >=20 > > The gpio interrupt status bit is getting set after the > > irq is disabled and causing an immediate interrupt after > > enablling the irq, so clear status bit on irq_unmask. > > > > Signed-off-by: Tengfei Fan >=20 > This looks pretty serious, can one of the Qcom maintainers ACK > this? >=20 > Should it be sent to fixes and even stable? >=20 > Fixes: tag? >=20 How is the interrupt status bit getting set after the irq is disabled? It looks like this is a level type interrupt? I thought that after commit b55326dc969e ("pinctrl: msm: Really mask level interrupts to prevent latching") this wouldn't be a problem. Am I wrong, or is qcom just clearing out patches on drivers and this is the last one that needs to be upstreamed?