From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8F59C31E50 for ; Sun, 16 Jun 2019 14:13:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A4A5D20870 for ; Sun, 16 Jun 2019 14:13:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727290AbfFPON1 (ORCPT ); Sun, 16 Jun 2019 10:13:27 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52980 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725874AbfFPON1 (ORCPT ); Sun, 16 Jun 2019 10:13:27 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5526036899; Sun, 16 Jun 2019 14:13:21 +0000 (UTC) Received: from krava (ovpn-204-53.brq.redhat.com [10.40.204.53]) by smtp.corp.redhat.com (Postfix) with SMTP id B40BD90C55; Sun, 16 Jun 2019 14:13:14 +0000 (UTC) Date: Sun, 16 Jun 2019 16:13:13 +0200 From: Jiri Olsa To: "Liang, Kan" , Peter Zijlstra Cc: Jiri Olsa , Arnaldo Carvalho de Melo , lkml , Ingo Molnar , Namhyung Kim , Alexander Shishkin , Andi Kleen , Tom Vaden Subject: [PATCH] perf/x86/intel: Disable check_msr for real hw Message-ID: <20190616141313.GD2500@krava> References: <20190614112853.GC4325@krava> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.11.4 (2019-03-13) X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Sun, 16 Jun 2019 14:13:26 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jun 14, 2019 at 09:45:21AM -0400, Liang, Kan wrote: > > > On 6/14/2019 7:28 AM, Jiri Olsa wrote: > > hi, > > the HPE server can do POST tracing and have enabled LBR > > tracing during the boot, which makes check_msr fail falsly. > > > > It looks like check_msr code was added only to check on guests > > MSR access, would it be then ok to disable check_msr for real > > hardware? (as in patch below) > > Yes, the check_msr patch was to fix a bug report in guest. > I didn't get similar bug report for real hardware. > I think it should be OK to disable it for real hardware. > thanks for confirmation, attaching the full patch thanks, jirka --- Tom Vaden reported false failure of check_msr function, because some servers can do POST tracing and enable LBR tracing during the boot. Kan confirmed that check_msr patch was to fix a bug report in guest, so it's ok to disable it for real HW. Cc: Kan Liang Reported-by: Tom Vaden Signed-off-by: Jiri Olsa --- arch/x86/events/intel/core.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 71001f005bfe..1194ae7e1992 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "../perf_event.h" @@ -4050,6 +4051,13 @@ static bool check_msr(unsigned long msr, u64 mask) { u64 val_old, val_new, val_tmp; + /* + * Disable the check for real HW, so we don't + * mess up with potentionaly enabled regs. + */ + if (hypervisor_is_type(X86_HYPER_NATIVE)) + return true; + /* * Read the current value, change it and read it back to see if it * matches, this is needed to detect certain hardware emulators -- 2.21.0