From: Stephen Boyd <sboyd@kernel.org>
To: Dinh Nguyen <dinguyen@kernel.org>
Cc: dinguyen@kernel.org, mturquette@baylibre.com,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] clk: socfpga: stratix10: add additional clocks needed for the NAND IP
Date: Tue, 25 Jun 2019 14:36:59 -0700 [thread overview]
Message-ID: <20190625213700.256D920883@mail.kernel.org> (raw)
In-Reply-To: <20190624214710.11836-1-dinguyen@kernel.org>
Quoting Dinh Nguyen (2019-06-24 14:47:10)
> The nand_clk is actually called the nand_x_clk and the parent is the
> l4_mp_clk, not the l4_main_clk. The nand_clk is a child of the
> nand_x_clk and has a fixed divider of 4. The same is true for the
> nand_ecc_clk.
>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
Applied to clk-next
prev parent reply other threads:[~2019-06-25 21:37 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-24 21:47 [PATCH] clk: socfpga: stratix10: add additional clocks needed for the NAND IP Dinh Nguyen
2019-06-25 21:36 ` Stephen Boyd [this message]
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