Re: [PATCH V4 11/18] clk: tegra210: use fence_udelay during PLLU init

Thierry Reding
2019-06-26T10:12:35Z

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On Sun, Jun 23, 2019 at 08:02:52PM -0700, Sowjanya Komatineni wrote:
> This patch uses fence_udelay rather than udelay during PLLU
> initialization to ensure writes to clock registers happens before
> waiting for specified delay.
>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
> drivers/clk/tegra/clk-tegra210.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)

Acked-by: Thierry Reding <treding@nvidia.com>

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