[patch 00/18] x86/apic: Support for IPI shorthands

[Thomas Gleixner <tglx@linutronix.de>]

The recent discussion about using HPET as NMI watchdog made me look into
IPI shorthand support. Also Nadav wanted to look into shorthands to speed
up certain TLB operations.

The support for IPI shorthands is rather limited right now and basically
got rendered useless by making it depend on CPU_HOTPLUG=n.

The reason for this is that shorthands are broadcasted and in case that not
all present CPUs have been brought up this might end up with a similar
effect as the dreaded MCE broadcast.

But this can be handled smarter than just preventing shorthands if CPU
hotplug is enabled. The kernel already deals with the MCE broadcast issue
for the 'nosmt' case. It brings up all present CPUs and then shuts down the
SMT siblings right away after they did the basic initialization and set
CR4.MCE.

The core CPU hotplug code keeps track of that information already, so it
can be used to decide whether IPI shorthands can be used safely or not.

If all present CPUs have been brought up at least once it's safe to switch
to IPI shorthand mode. The switch over is done with a static key and can be
prevented completely with the existing (so far 32bit only) command line
option.

As a offlined CPU still receives IPIs the offline code is changed to soft
disable the local APIC so the offline CPU will not be bothered by shorthand
based IPIs. In soft disabled state the APIC still handles NMI, INIT, SIPI
so onlining will work as before.

To support NMI based shorthand IPIs the NMI handler gets a new check right
at the beginning of the handler code which lets the handler ignore the NMI
on a offline CPU and not call through the whole spaghetti maze of NMI
handling.

Soft disabling the local APIC on the offlined CPU unearthed a KVM APIC
emulation issue which is only relevant for CPU0 hotplug testing. The fix is
in the KVM tree already, but there is no need to have this dependency here.
(0-day folks are aware of it).

The APIC setup function has also a few minor issues which are addressed in
this series as well.

Part of the series is also a consolidation of the APIC code which was
necessary to not spread all the shorthand implementation details to header
files etc.

It survived testing on a range of different machines including NMI
shorthand IPIs. Aside of the KVM APIC issue, which is only relevant in
combination with CPU0 hotplug testing, there are no known side effects.

The series is also available from git:

   git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git WIP.x86/ipi

Thanks,

	tglx

8<-------------------
 arch/x86/include/asm/apic_flat_64.h     |    8 -
 arch/x86/include/asm/ipi.h              |  109 ----------------------
 arch/x86/kernel/apic/x2apic.h           |    9 -
 b/arch/x86/include/asm/apic.h           |    3 
 b/arch/x86/include/asm/bugs.h           |    2 
 b/arch/x86/include/asm/processor.h      |    2 
 b/arch/x86/kernel/apic/apic.c           |  155 ++++++++++++++++++++------------
 b/arch/x86/kernel/apic/apic_flat_64.c   |   41 +++-----
 b/arch/x86/kernel/apic/apic_noop.c      |   18 ---
 b/arch/x86/kernel/apic/apic_numachip.c  |    8 -
 b/arch/x86/kernel/apic/bigsmp_32.c      |    9 -
 b/arch/x86/kernel/apic/ipi.c            |  103 +++++++++++++++------
 b/arch/x86/kernel/apic/local.h          |   68 ++++++++++++++
 b/arch/x86/kernel/apic/probe_32.c       |   41 --------
 b/arch/x86/kernel/apic/probe_64.c       |   16 ---
 b/arch/x86/kernel/apic/x2apic_cluster.c |   26 +++--
 b/arch/x86/kernel/apic/x2apic_phys.c    |   29 +++--
 b/arch/x86/kernel/apic/x2apic_uv_x.c    |   28 -----
 b/arch/x86/kernel/cpu/bugs.c            |    2 
 b/arch/x86/kernel/cpu/common.c          |   11 ++
 b/arch/x86/kernel/nmi.c                 |    3 
 b/arch/x86/kernel/smpboot.c             |   13 ++
 b/include/linux/cpumask.h               |    2 
 b/kernel/cpu.c                          |   11 +-
 24 files changed, 354 insertions(+), 363 deletions(-)