From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A25AC4649B for ; Fri, 5 Jul 2019 13:19:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CB4FA218CA for ; Fri, 5 Jul 2019 13:19:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="3GP3RPKu" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729045AbfGENT1 (ORCPT ); Fri, 5 Jul 2019 09:19:27 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:55782 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726794AbfGENT1 (ORCPT ); Fri, 5 Jul 2019 09:19:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=nWbKLFHL+b+hFBq0825QJ0Fh8N/yT85HADdlrJpqwCQ=; b=3GP3RPKu7ZpFV7+cfZjE+vohUc Bex/2CpZC7Ala0E0eG4LZVetEHQEb/pfJHowfchWGZpWrdgaXwHw7j7iVZVhdnGDzqhJtwb9f/Eeo KLOig8uZwjFnSMbwTDYL8WRA0Mk0Pe6SrZtuUPnX5rsJaDgQ9SE3ZqwIKhT9NdjVOm9A=; Received: from andrew by vps0.lunn.ch with local (Exim 4.89) (envelope-from ) id 1hjO7O-0001Br-S6; Fri, 05 Jul 2019 15:19:14 +0200 Date: Fri, 5 Jul 2019 15:19:14 +0200 From: Andrew Lunn To: Claudiu Manoil Cc: Vladimir Oltean , Alexandre Belloni , "Allan W. Nielsen" , "David S . Miller" , "devicetree@vger.kernel.org" , "netdev@vger.kernel.org" , Alexandru Marginean , "linux-kernel@vger.kernel.org" , "UNGLinuxDriver@microchip.com" , Allan Nielsen , Rob Herring , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH net-next 4/6] arm64: dts: fsl: ls1028a: Add Felix switch port DT node Message-ID: <20190705131914.GA4428@lunn.ch> References: <20190621164940.GL31306@lunn.ch> <20190624115558.GA5690@piout.net> <20190624142625.GR31306@lunn.ch> <20190624152344.3bv46jjhhygo6zwl@lx-anielsen.microsemi.net> <20190624162431.GX31306@lunn.ch> <20190624182614.GC5690@piout.net> <20190705044945.GA30115@lunn.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Nice discussion, again, but there's a missing point that has not been > brought up yet. We actually intend to support the following hardware > configuration: a single PCI device consisting of the Microsemi's switch core > and our DMA rings. > The hardware supports this configuration into a single PCI function (PF), > with a unique PCI function id (0xe111), so that the same driver has access to > both switch registers and DMA rings connected to the CPU port. This device > would qualify as a switchdev device, and we can simply reuse the existing > ocelot code for the switch core part. The initial patch set was the first step in > supporting the switch core on our platform, we just need to add the support > for the DMA rings part, to make it a complete switchdev solution. Hi Claudiu It sound like in the end you will have a core library and then two drivers wrapped around it, giving a pure switchdev device with polled IO or DMA, and a DSA driver using a CPU port. Andrew