From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90B2FC606BD for ; Mon, 8 Jul 2019 15:19:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 68DBA2171F for ; Mon, 8 Jul 2019 15:19:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1562599184; bh=o9feKfxPZvibdB5icEli4TLI3ch2T7CbYL+KrybYP9I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=UuGbC+Eqf+yT+2W+pO+4pj87R9eeqsy+djOhTyVCPDfffogbV3Ujg9A6QK0hs5sjX h5BRV4i0Qdin1vRDfSnPTcut/X0uAGO8rF1ZUxVm4GuB6rMzFrbSMGu+/sQJo1QRlD pJkf9TwZeohW3VSP0g/zGO/p5Zn33VpwzpPFwgkg= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733296AbfGHPTn (ORCPT ); Mon, 8 Jul 2019 11:19:43 -0400 Received: from mail.kernel.org ([198.145.29.99]:44092 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733282AbfGHPTj (ORCPT ); Mon, 8 Jul 2019 11:19:39 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4596321537; Mon, 8 Jul 2019 15:19:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1562599178; bh=o9feKfxPZvibdB5icEli4TLI3ch2T7CbYL+KrybYP9I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NgAIasHtmNzJbAPbq/7dY0hCITTuUy36iYp7aFZIxeRx7IepkkdbkNVq2/0g/Sa89 GxUBfzzIZ1r6tmMwnWj3GVWaj/94tr71cIhgH7jy0AdhJKE/czueT/UTjG64+g9nDR fDZrNPca4iqaIF3xcn4W6w3KVVdpRX429dGvQRxo= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Christoph Niedermaier , Fabio Estevam , =?UTF-8?q?S=C3=A9bastien=20Szymanski?= , Shawn Guo Subject: [PATCH 4.9 030/102] ARM: imx: cpuidle-imx6sx: Restrict the SW2ISO increase to i.MX6SX Date: Mon, 8 Jul 2019 17:12:23 +0200 Message-Id: <20190708150527.898627615@linuxfoundation.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190708150525.973820964@linuxfoundation.org> References: <20190708150525.973820964@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Fabio Estevam commit b25af2ff7c07bd19af74e3f64ff82e2880d13d81 upstream. Since commit 1e434b703248 ("ARM: imx: update the cpu power up timing setting on i.mx6sx") some characters loss is noticed on i.MX6ULL UART as reported by Christoph Niedermaier. The intention of such commit was to increase the SW2ISO field for i.MX6SX only, but since cpuidle-imx6sx is also used on i.MX6UL/i.MX6ULL this caused unintended side effects on other SoCs. Fix this problem by keeping the original SW2ISO value for i.MX6UL/i.MX6ULL and only increase SW2ISO in the i.MX6SX case. Cc: stable@vger.kernel.org Fixes: 1e434b703248 ("ARM: imx: update the cpu power up timing setting on i.mx6sx") Reported-by: Christoph Niedermaier Signed-off-by: Fabio Estevam Tested-by: Sébastien Szymanski Tested-by: Christoph Niedermaier Signed-off-by: Shawn Guo Signed-off-by: Greg Kroah-Hartman --- arch/arm/mach-imx/cpuidle-imx6sx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) --- a/arch/arm/mach-imx/cpuidle-imx6sx.c +++ b/arch/arm/mach-imx/cpuidle-imx6sx.c @@ -15,6 +15,7 @@ #include "common.h" #include "cpuidle.h" +#include "hardware.h" static int imx6sx_idle_finish(unsigned long val) { @@ -108,7 +109,7 @@ int __init imx6sx_cpuidle_init(void) * except for power up sw2iso which need to be * larger than LDO ramp up time. */ - imx_gpc_set_arm_power_up_timing(0xf, 1); + imx_gpc_set_arm_power_up_timing(cpu_is_imx6sx() ? 0xf : 0x2, 1); imx_gpc_set_arm_power_down_timing(1, 1); return cpuidle_register(&imx6sx_cpuidle_driver, NULL);