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[93.103.18.160]) by smtp.gmail.com with ESMTPSA id i18sm19986388wrp.91.2019.07.15.07.21.15 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 15 Jul 2019 07:21:15 -0700 (PDT) From: Uros Bizjak To: tglx@linutronix.de, luto@amacapital.net, x86@kernel.org, linux-kernel@vger.kernel.org Cc: Uros Bizjak Subject: [PATCH] x86/cpu/intel: Skip CPA cache flush on CPUs with cache self-snooping Date: Mon, 15 Jul 2019 16:21:09 +0200 Message-Id: <20190715142109.3063-1-ubizjak@gmail.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org CPUs which have self-snooping capability can handle conflicting memory type across CPUs by snooping its own cache. Commit #fd329f276ecaa ("x86/mtrr: Skip cache flushes on CPUs with cache self-snooping") avoids cache flushes when MTRR registers are programmed. The Page Attribute Table (PAT) is a companion feature to the MTRRs, and according to section 11.12.4 of the Intel 64 and IA 32 Architectures Software Developer's Manual, if the CPU supports cache self-snooping, it is not necessary to flush caches when remapping a page that was previously mapped as a different memory type. Note that commit #1e03bff360010 ("x86/cpu/intel: Clear cache self-snoop capability in CPUs with known errata") cleared cache self-snoop capability for CPUs where conflicting memory types lead to unpredictable behavior, machine check errors, or hangs. Signed-off-by: Uros Bizjak --- arch/x86/mm/pageattr.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 6a9a77a403c9..e2704996f9c5 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c @@ -1725,10 +1725,11 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages, goto out; /* - * No need to flush, when we did not set any of the caching - * attributes: + * No need to flush when CPU supports self-snoop or + * when we did not set any of the caching attributes: */ - cache = !!pgprot2cachemode(mask_set); + cache = !static_cpu_has(X86_FEATURE_SELFSNOOP) && + pgprot2cachemode(mask_set); /* * On error; flush everything to be sure. -- 2.21.0